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R Series Reconfigurable I/O Module (AI, AO, TTL-compatible DIO) for PXI Express, 2 AI, 24 AO, 32 TTL-compatible DIO, 1 MS/s AIO, 512 MB DRAM, Kintex-7 160T FPGA

R Series Reconfigurable I/O Module (AI, AO, DIO) for PXI Express, 6 AI channels, 18 AO channels, 48 DIO channels, Kintex-7 325T FPGA, 1 MS/s AI Sample Rate

A base clock is a digital signal existing in hardware that you can use as a clock for an FPGA application. The following figures show the clock routing for the respective PXIe-786x base clocks.

A base clock is a digital signal existing in hardware that you can use as a clock for an FPGA application. The following figure shows the clock routing for the PXIe-782xR base clocks.

NI recommends that you reserve the trigger lines used by NI PXI R Series devices. If two PXI devices try to drive the same trigger line in different applications, or if the PXI devices are not programmed ...

This device supports arbitration to determine which object can access the resource if multiple objects request access at the same time. Configure the arbitration settings for the channels of this device ...

This device supports arbitration to determine which object can access the resource if multiple objects request access at the same time. Configure the arbitration settings for the channels of this device ...

This device supports arbitration to determine which object can access the resource if multiple objects request access at the same time. Configure the arbitration settings for the channels of this device ...

R Series Reconfigurable I/O Module (AI, AO, DIO) 8 AI channels, 8 AO channels, 48 DIO channels, Kintex-7 K70T FPGA, 500 kS/s AI Sample Rate

R Series Reconfigurable OEM I/O Module (AI, AO, DIO) 8 AI channels, 8 AO channels, 48 DIO channels, Kintex-7 K70T FPGA, 500 kS/s AI Sample Rate

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