Introduction to LabVIEW Co-Simulation in AWR Visual System Simulator


The AWR design environment (AWRDE) is suite of high-frequency circuit and system level tools that improve the productivity of microwave design engineers. The design environment includes products such as:

• Microwave office for schematic and layout
• AXIEM for electromagnetic simulation
• APLAC for harmonic balance time domain simulation
• Visual System Simulator for link budget and RF system design

Here, we’ll specifically focus on Visual System Simulator (VSS) and its connectivity to NI LabVIEW graphical system design software. VSS is a system-level simulation tool that allows engineers to architect and simulate complete communications and microwave systems – from RADAR to LTE. Beginning with AWR 2011, the VSS diagrams can co-simulate capabilities NI LabVIEW code. This feature not only expands the signal processing capabilities of VSS tool – but also expands VSS connectivity to hardware and instrumentation.


Using the LabVIEW Element in VSS

Co-simulation within the AWR design environment is enabled through a LabVIEW element on the VSS diagram.  Underneath the hood, this feature is enabled by VI server technology, which enables LabVIEW code to be remotely executed either through the LabVIEW runtime engine or development environment.  As we’ll describe, creating and configuring LabVIEW code to be executed by VSS can be accomplished in a few simple steps.  For background information on the VSS system tool, please visit the VSS product page.


Step 1: Create and Configure a LabVIEW VI

In order to explain how co-simulation between VSS and LabVIEW works, let’s start with a simple LabVIEW VI which performs a complex conjugate operation on an array of complex double samples.  Here, we’ve chosen to use the complex double datatype because it is frequently used to represent time domain IQ samples of an RF signal.  In Figure 1, observe both the front panel and block diagram of a LabVIEW VI. Note that both an input control and an output indicator have been configured on the connector pane of the LabVIEW front panel. 

Figure 1. LabVIEW VI configured for execution within the VSS environment.

Configuring the connector pane is an essential step to running LabVIEW code from VSS – as it determines which controls and indicators can be “seen” from the VSS.  Each of these controls and indicators will eventually map to ports on the LabVIEW element in the VSS system diagram.  Note that this configuration step is identical to configuration required for execution as a LabVIEW subVI.


Step 2. Configure the LabVIEW Element in VSS

Once a LabVIEW VI is appropriately configured to execute as a subVI, the next step is to place and configure a LabVIEW element on the VSS system diagram.  By default, the LabVIEW element will not have connection ports – since these must be added through a configuration step.  To do this, double-click on the LabVIEW node to open the configuration panel.  A configuration panel will appear – as shown in Figure 2.

Figure 2. A configuration panel is used to connect controls and indicators in the LabVIEW environment to ports in the VSS environment.

Once the LabVIEW configuration panel is open, browse for the desired VI path.  Once the path is selected, one can configure both input and output ports by clicking on the “add” button next to each category.  With the VI correctly loaded, the VSS environment will “see” which LabVIEW controls and indicators have been configured in the VI connector pane.  In Figure 2, observe that we’ve chosen to configure a particular VI with several controls and indicators in the connector pane.  As the image illustrates, each control and each indicator on the connector pane is mapped to an input or output port in VSS.  As we see in Figure 2, the LabVIEW element can support multiple input and output ports.  


Step 3: Build the VSS diagram

With the LabVIEW element appropriately configured – each port on the VSS element can be connected to other elements in the VSS environment.  When passing signals between LabVIEW and VSS, the appropriate datatype is an array of complex doubles (or cluster containing an array of complex doubles).  This datatype easily maps to other elements in VSS, as shown in Figure 3.

Figure 3. LabVIEW Co-Simulation is enabled through the LabVIEW element in VSS

As we observe in Figure 3, LabVIEW diagrams can be inserted directly into the VSS diagram – and will execute in conjunction with other VSS elements.


Step 4: Execution of the VSS Diagram

The execution of LabVIEW code within the VSS system diagram occurs once the VSS diagram is simulated.  Consistent with the execution flow of the VSS diagram, samples are passed both into and out of each LabVIEW element in VSS through the configured controls and indicators.  Note that LabVIEW code can be executed by the AWR design environment by invoking either the LabVIEW development environment or runtime engine - depending on user selection.  When the LabVIEW development environment is selected as the execution mechanism, both block diagram as well as front panel can be observed and debugged while LabVIEW code is running. 


Using LabVIEW for Instrument Control and Hardware-in-the-Loop

One of the benefits of LabVIEW connectivity to the AWR design environment is the enhanced ability to incorporate real-world sampled data into the simulation.  One application where this is highly beneficial is Hardware-in-the loop simulation.  With hardware-in-the loop simulations physical hardware is connected to a VSS system diagram through a hardware interface and incorporated as part of the simulation.  To illustrate this concept, consider Figure 4, which illustrates an example VI designed to connect to hardware.  As the diagram illustrates, the connectivity between the system diagram and hardware occurs through the LabVIEW element.

Figure 4. HIL simulation requires control of RF instruments such as RF signal generators and RF signal analyzers.

As we observe in Figure 4, the LabVIEW diagram has been designed to pass an array if IQ samples to an RF signal generator – and acquire an array of IQ samples from an RF signal analyzer.  Using this approach, any RF component can be inserted between the signal generator and analyzer to be incorporated into the simulation.

One benefit of HIL simulation is that it allows engineers to use a combination of real and simulated (or modeled) components to simulate a complex system like an RF receiver or complete communications system.  This is especially useful in scenarios where a component is particularly difficult to model – or when a sub-system’s performance is variable according to environmental conditions.  In these scenarios, it’s relatively straightforward to apply the appropriate environment to a HW component while modeling the system as a whole.


Using LabVIEW for Signal Processing within AWR Design Environment

LabVIEW co-simulation with VSS diagram opens the powerful signal processing capabilities of LabVIEW system design software to VSS users.  LabVIEW contains a wide range of algorithms including:

  • Transforms including FFT, IFFT, Hilbert, Laplace, etc.
  • Mathematical operations such as derivative, integral, curve fitting, and matrix math
  • Signal operations including decimation, interpolation, and cross-correlation
  • Wide range of filtering functions including FIR, IIR, Bessel, Chebyshev, and custom.
  • Modulation and demodulation for schemes including AM, FM, PM, MSK, PSK, QAM, and more
  • Creation and analysis of wireless standards signals including 802.11a/b/g/n/ac, Bluetooth, GSM/EDGE, WCDMA/HSPA/HSPA+, LTE, and WiMAX

While the VSS environment already contains native signal processing libraries, integration with LabVIEW enables engineers to easily customize algorithms or use pre-existing LabVIEW algorithm IP.  In addition, when using LabVIEW measurement functions for wireless standards measurements such as 802.11ac and LTE, engineers can easily correlate measurement results between the simulation environment and physical hardware. 

Traditionally, correlating measurements between the simulation environment and physical hardware often proves quite difficult.  Especially for more complex physical layers such as that of WCDMA, LTE, and 802.11ac, even slight variations between two different measurement algorithms can produce different measurement results.  As a result, it’s often very useful to use a common measurement algorithm in both the simulation and test of a product.

For example, consider the design and test of an LTE power amplifier.  Typical design and test metrics include traditional PA specifications such as 1 dB compression point and IP3.  However, given with a part designed specifically for a wireless standard such as LTE, it’s common to measure “LTE-specific” characteristics such as adjacent channel power (ACP) and error vector magnitude (EVM).  In these cases, signal creation and analysis capabilities of LabVIEW can be easily configured to test a “virtual” DUT through the VSS-LabVIEW interface.  In Figure 5, observe a VSS diagram in which two separate LabVIEW VI's have been configured as the source and receiver to the PA design.

Figure 5. Modulation and demodulation for wireless standards IP in LabVIEW can be used within the VSS environment.

In figure 5, the leftmost LabVIEW element calls a LabVIEW subVI to create an LTE waveform.  This waveform is then passed to the amplifier block – which is simulated using a model generated by AWR Microwave Office.  As a result of the amplifier model, the IQ waveform is both amplified and distorted according to the behavioral characteristics of the amplifier.  Finally the right-most LabVIEW block in VSS calls a subVI to demodulate and measure characteristics of the LTE signal.  Since these LabVIEW-based algorithms can be can be shared between the design and test environments – measurements in the design environment can be easily correlated with measurements on physical hardware.


Using LabVIEW and PXI for Advanced System Design

A final family of applications that can be addressed through LabVIEW and VSS connectivity is advanced embedded RF system design.  With these types of applications, complex RF systems are frequently designed and simulated within the AWR design environment, and prototyped using commercial off-the-shelf technology (COTS) RF front ends (such as PXI instruments).  In this scenario, an engineer will use an RF signal generator or analyzer to create a proof-of-concept for a new design.  In this case, the instrument is used as a prototype radio rather than a method of measuring RF performance of a DUT.

For example, consider the design and prototyping of a RADAR system.  In this type of system, the deployed hardware includes an RF front end transceiver and a baseband processing unit.  Within the transmit portion, the RADAR system is able to produce a range of RADAR pulses and broadcast them at L-band or X-band frequencies.  On the receive side, the baseband processor is designed to determine an objects range, velocity, and direction through sophisticated signal processing algorithms.

In the design of a complex RADAR system, the front end, antennas, wireless channel, and even the target can be simulated in software environments such as AWR Visual System Simulator.  In this case, the benefit of simulation is that a design can be quickly tested and modified without the cost of producing physical hardware.  As design engineers continue to find new solutions to dealing with common RADAR challenges such as noise and interference, baseband demodulation algorithms are continuing to increase in complexity.  Adding to the challenge, these algorithms are typical designed for fixed-point processing targets such as FPGA’s in order to execute in real-time.

For engineers designing complex systems such as a RADAR in the AWR design environment, one benefit of LabVIEW connectivity is that engineers can easily integrate LabVIEW FPGA and VHDL code with RADAR designs in VSS.  In this setup, the RF front end is modeled in VSS, and the baseband processing portion is designed in LabVIEW.  In LabVIEW, engineers can create fixed-point decoding algorithms in either LabVIEW FPGA or VHDL – and use NI hardware targets such as FlexRIO to co-simulate these algorithms as part of their VSS simulation.  The benefit of LabVIEW FPGA to VSS connectivity is twofold.  Not only does this provide engineers and easy path to prototyping a RADAR system with PXI RF instrumentation, but it also allows engineers to the skip the step of prototyping their algorithms in floating point math.  By designing these algorithms in fixed-point math from the beginning, translation from floating to fixed point is unnecessary.



LabVIEW co-simulation within the AWR design environment enables a broad range of applications including hardware-in-the-loop, correlation between simulation and test, and advanced system design.  For more information about the AWR design environment and VSS software, please visit  For more information about NI PXI RF instrumentation, please visit