JTAG Digital Waveform Reference Library

Publish Date: Feb 04, 2019 | 3 Ratings | 4.33 out of 5 | Print | 1 Customer Review | Submit your review


The Joint Test Action Group (JTAG) devised a method of controlling boundary-scan devices and standardized it in IEEE 1149.1. JTAG is used for in-system programming (ISP) in-circuit test (ICT) and is a common requirement for automated test systems, validation stations, and even design studios.
The JTAG Digital Waveform (JDW) component provides high-level building blocks that allow a system designer to construct valid TAP control waveforms with custom timing, as well as examples of simple JTAG instructions. These waveforms can be generated using any National Instruments hardware-timed digital I/O device. Additionally, they support features of the 6547, 6548, 6551, 6552, and 6556 devices (per-cycle tri-state and hardware compare) that make retrieving and parsing TDO data fast and efficient.

Table of Contents

  1. JTAG Specification
  2. The JTAG Digital Waveform Component
  3. Using the JDW Library to Generate JTAG Signals
  4. Related Articles
  5. Discussion and Feedback

1. JTAG Specification

The JTAG interface is defined in IEEE Standard 1149.1.  A high-level description can be found on Wikipedia. The current specification (IEEE 1149.1-2001, IEEE standard test access port and boundary-scan architecture) is available for purchase from IEEE Xplore.

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2. The JTAG Digital Waveform Component

The NI JTAG Digital Waveform component installs a new library into the <user.lib> folder, called JDW.lvlib. This library contains all the API VIs, type definitions, subVIs, and polymorphic instance VIs belonging to the component. The API VIs can be placed on the diagram from the JTAG Digital Waveform palette in the User Libraries function palette.

JTAG Digital Waveform palette

The JTAG Digital Waveform palette contains two rows of VIs.  The top row contains the critical-path functions that are required to build a JTAG waveform.  The bottom row contains optional, utility, and low-level functions.

The component also installs an example VI into the Example Finder. (See below.)

Optional JTAG Signals

The JTAG port is strictly defined in IEEE 1149.1-2001, and the JDW library adheres to this specification.  All required output signals (TDI, TMS, TCK) are generated.  There is an input signal, TDO, that is also generated by the JDW library using compare bit states (L, H, X).  The TDO signal can be removed from the JTAG waveform when using a device that lacks a Hardware Compare feature.

JTAG specifies an optional TRST* line, used to instantly reset a device's TAP controller.  The JTAG Digital Waveform (JDW) library also generates this signal, which can optionally be removed from the output waveform as well.


JDW.lvlib contains the following API functions:

Init.vi performs two functions: It coerces timing values to the generating device's sample clock and validates the coerced parameters against the desired JTAG clock rate. It then creates the session cluster (JTAG waveform info) that is used by the waveform component VIs.

Init.vi is polymorphic. Its default action is to preallocate memory for the JTAG waveform. This greatly increases the execution speed of the waveform component VIs, but it requires a parameter for how many samples will be used in the waveform. Its alternate action, which is not to preallocate memory, circumvents this requirement at the cost of execution speed.

Close.vi closes the session by converting the JTAG waveform info cluster into a Digital Waveform Datatype (DWDT). This waveform can also optionally be appended to an existing DWDT.

This VI performs two functions specific to the HSDIO line of NI devices. Devices that use the NI-HSDIO driver commonly require waveforms to meet a specific memory alignment. This is specified as a sample quantum, usually 2, 4 or 8 samples. When building the DWDT, the VI coerces the waveform's length to a multiple of the sample quantum by duplicating the last sample repeatedly. The NI 6547, 6548, 6551, 6552, and 6556 devices also feature a Hardware Compare engine that can compare sampled data to an expected waveform in real-time, making the analysis of TDO data much more efficient. This VI outputs a list of bit sample locations that the Hardware Compare engine will analyze in the waveform.

Change TAP State.vi is used to drive the TAP controller on boundary-scan devices.  It adds the appropriate samples to the waveform in order to move the TAP controller from its current state to the desired state.  It only needs to be called once for any transition, regardless of how many states are traversed in the path to the desired state.

Load-Unload Registers.vi is used to shift data into and out of the TAP controller.  It adds samples to the waveform to clock data into TDI and out of TDO while keeping the TAP controller in the appropriate SHIFT state. When the last sample has been clocked out, it leaves the TAP controller in the EXIT1 state.

Add Clocked Bit.vi is a low-level function that appends a single bit to a JTAG waveform.  This VI is polymorphic. In its "No Data" state, it only drives the TMS line. In its "Data" state, it drives TDI and TMS, and it provides a Hardware Compare state for TDO.

Get TMS Values.vi is a low-level function that uses a lookup table to generate the set of successive value that must be driven on the TMS line to put the TAP controller into a desired state.  These "TMS bits" must be provided in successive calls to the Add Clocked Bit VI in order to actually change the state of the TAP controller.

Interpret Data.vi is a low-level function that converts a bitfield of data into an array of digital data that is compatible with the Digital Waveform Datatype (DWDT). For the TDI signal, it turns bits into an array of the drive states [1, 0]. For the TDO signal, it turns them into an array of the compare states [H, L].  The output array of bits is used by successive calls to the Add Clocked Bit VI ("Data" instance), providing the TDI or TDO state in each call.

This VI is polymorphic, adapting automatically to the datatype that is wired into the "Raw data" input (U8, U16, U32, U64).

Reset.vi adds samples to the JTAG waveform that pull the TRST* line low in order to reset any boundary scan devices that support this feature.

Installed Examples

An example VI is installed by this component. To open it using the NI Example Finder, select "Browse according to Directory Stuccoed" and navigate to the JTAG Digital Waveform folder. It can also be found at the installation path <lvdir>/examples/JTAG Digital Waveform.

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3. Using the JDW Library to Generate JTAG Signals

Controlling a boundary-scan device through JTAG consists of two primary actions: managing the state of the TAP controller and shifting data through the various registers.  The JDW palette provides a single high-level tool for each of these actions.

Managing the TAP controller's state is handled entirely by the JDW API.  The user does not need to know which state the controller is in at any time because the API stores the state in the JTAG waveform info cluster.  The Change TAP State VI uses this current state and a lookup table to determine which TMS values must be clocked in to move the TAP controller to a new state.  (The optimal state-transition path is always chosen.)

NOTE: It is assumed that, after initializing the waveform cluster with the Init VI, the TAP controller is in the TEST-LOGIC-RESET state.  The Init VI provides a control to force this state by clocking five "TMS=1" bits into the TAP controller, which is guaranteed to move it to the TEST-LOGIC-RESET state regardless of its current state.  If all devices in the scan chain have a TRST* line, the Reset VI can also be used to force the TAP into the TEST-LOGIC-RESET state. In this case, it should be called immediately after Init and can be called optionally at any time after.

Shifting data through the registers is handled by the Load-Unload Registers VI.  It clocks each element of the input arrays through the TAP controller, remaining in the SHIFT-DR (or SHIFT-IR, whichever is appropriate) state with each bit. On the last bit, it transitions out of the SHIFT state so the next clock cycle won't shift in a bit accidentally.

Using these two VIs together, a test designer can quickly build a very large JTAG waveform with very little LabVIEW code.  For example, loading any instruction into the TAP controller will only require the Change TAP State VI to put the controller into the SHIFT-IR state, followed by the Load-Unload Registers function to clock data into the instruction register.

A utility function, Interpret Data, is provided to convert numeric data -- TAP instructions, device ID codes, register values, etc -- to the array data required by the Load-Unload Registers VI.

In the event that a custom function needs to be implemented for a test, two low-level VIs -- upon which the high-level VIs are also constructed -- are provided on the palette. Get TMS Values performs a lookup to decide the optimal state transitions needed to move the TAP controller to a desired state.  Add Clocked Bit appends the JTAG waveform with a single clock cycle, during which any of the TMS, TDI, and TDO lines can be affected manually.

For a working example of the proper use of the JDW VIs, see the installed example program.

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4. Related Articles

This whitepaper explains the use of the IDW library functions in isolation. For an explanation of their use in conjunction with NI-DAQmx or NI-HSDIO based devices, refer to:

NI Systems Engineering has also created additional components for other serial protocols:

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5. Discussion and Feedback

This component was created by the NI Systems Engineering group.

We welcome discussion and feedback about this component.  The JTAG Digital Waveform Library thread is available on the NI Discussion Forums for questions, comments, and suggestions.

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Customer Reviews
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Please post discussions in the forum.  - Feb 19, 2009

Comments posted here will not be seen by the Systems Engineers. We will respond to discussions posted in the forum thread: http://forums.ni.com/ni/board/message?board.id=Components&thread.id=111

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