Sharing a sample clock is essential when using NI digital devices in a test environment. To fully facilitate clock sharing, NI digital devices have several methods of exporting and importing clocks.
Most NI digital devices provide a single high-precision 200 MHz voltage-controlled crystal oscillator (VCXO) clock source. The exceptions to this are the NI PXIe-6544/5/7/8 devices, which provide a single high-precision 800 MHz voltage-controlled oscillator (VCO) clock source that is sent through a DDS circuit. All NI digital devices have an onboard phase-locked loop (PLL) circuit, which lets you phase-lock the onboard clock to the reference clock, if one is provided.
Based on the form factor of the digital instrument you use, you can share the clock in multiple ways. All NI digital devices can import a sample clock through the CLK IN front panel SMB jack connector. This external clock can be any sine or square wave signal that meets the specifications of the particular digital device. PXI devices can also use the PXI_STAR line as an external frequency input channel, giving you the ability to provide an alternate frequency as the sample clock rate.
The clock of a NI digital instrument can also be exported from the CLK OUT front panel SMB or the DDC CLK OUT pin on the DDC connector. The exported sample clock is generated at the logic family voltage levels specified for dynamic generation.
The onboard frequency generator on NI devices uses a PLL circuit to lock the high-frequency internal time base of the device to a known reference frequency. The most common clock to which the NI device is locked is the reference clock signal on the PXI or PXI Express chassis backplane. This clock signal is shared among all modules in the system, so you can lock all the modules in your system to this stable clock. PXI_CLK10 is the 10 MHz reference signal that is available for PXI devices, and PXIe_CLK100 is the 100 MHz reference signal that is available for PXI Express devices.
NI PCI digital devices can still share a reference clock using the RTSI 7 line on the RTSI bus, allowing for synchronization of multiple PCI devices.
The STROBE channel on the DDC connector is a dedicated channel for the STROBE signal. You can use STROBE only for acquisition sessions.
Designed for use in source-synchronous data transfer applications, the data channels are sampled precisely on a user-selected edge (programmable as rising or falling edge) of the STROBE signal, when configured as the sample clock. The advantage of using STROBE as the sample clock source signal for the acquisition operation is that the acquisition session sample clock and the data channels now travel together through the same cable and system delays, maintaining time correlation between them.
NI digital devices have only one onboard clock, so usually generation and acquisition sessions on the same NI device must use the same sample clock rate. However, with STROBE as the clock for acquisition operations, generation and acquisition operations can use two different time bases.
Events and Triggers
NI digital devices use events and triggers to synchronize generation and acquisition tasks between devices. Triggers are used to control the acquisition or generation of a digital device, while events are used as notifications of specific operations.
||Data Active Event
||Ready for Start Event
||Ready for Advance Event
||End of Record Event
||Sample Error Event
Table 2: HSDIO Device Triggers and Events
2 The stop trigger is valid only for generation sessions and available only for the NI PXIe-6545.