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This document contains the NI-SmartNIC known issues that were discovered before and since the release of NI-SmartNIC 2025 Q4. Known issues are performance issues or technical bugs that NI has acknowledged exist within this version of the product.
Not every issue known to NI appears on this list; it is intended to show the most severe and common issues that you may encounter and provide workarounds when possible. Other technical issues that you may encounter could occur through normal product use or system compatibility issues. You may find more information on these issues in NI’s Product Documentation, Knowledgebase, or Community; see Additional Resources.
|
Bug Number |
Legacy ID |
Description |
Details |
|---|---|---|---|
| 3162256 |
Compiling FPGA bitfiles using AMD Vivado scripts will fail with "DRC INBB-3" errorAfter generating intermediate files, when compiling an FPGA bitfile for PXIe-8290 using AMD Vivado scripts the compile fails with a "DRC INBB-3 black box" error. Workaround: This issue can occur because of limited file permissions for the user executing the Vivado compile script which can prevent being able to write output files into their default directory. This can be avoided by changing the output directory of the generated scripts.
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Reported Version: NI-SmartNIC: 2025 Q3 Resolved Version: N/A Added: Jul 21, 2025 |
|
| 3190691 |
niFpgaGenerateLvbitx.vi missing from PXIe-8290 FPGA project folderAfter compiling the FPGA project with Vivado finishes, the niFpgaGenerateLvbitx.vi script to convert the *.pdi output from Vivado to a .lvbitx is missing.
Workaround: Once the build is finished, manually copy niFpgaGenerateLvbitx.vi in order to convert your pdi to an lvbitx.
|
Reported Version: NI-SmartNIC: 2025 Q3 Resolved Version: N/A Added: Jul 21, 2025 |
|
| 3353586 |
PXIe-8290 will power down when a thermal or power limit is reached after the user session is stoppedIf the PXIe-8290 is used in such a way that it exceeds the power or thermal rating, it will stop the user's session to reduce power usage. If that is not sufficient to maintain safe power usage and temperatures, the PXIe-8290 will power down, likely causing the PXI controller to crash with a BSoD. Workaround: To avoid this issue, monitor that the temperature remains below 98 degrees Celsius in NI Hardware Configuration Utility, and verify that the Module Cooling property reports it's state to be Normal.
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Reported Version: NI-SmartNIC: 2025 Q4 Resolved Version: N/A Added: Oct 20, 2025 |
|
| 3398299 |
PXIe-8290 operates at incorrect clock rates when set to operate at 175 MHzWhen using the MgtReferenceClockRates property exposed through the System Configuration API by the PXIe-8290, passing a value of 175 MHz will incorrectly configure the clocking chip to generate a 306.25 MHz MGT reference clock instead of the expected 175 MHz. In an FPGA design using Aurora IP that expects a 175 MHz reference clock, this will cause the PLL to fail to lock and the Aurora links will fail to come up. Workaround: There is no workaround to configure the MGT reference clock for 175 MHz. If the FPGA design can tolerate other MGT reference clock rates, a workaround is to set the MgtReferenceClockRates property to another supported value (156.25 MHz or 312.5 MHz).
|
Reported Version: NI-SmartNIC: 2025 Q4 Resolved Version: N/A Added: Oct 21, 2025 |
Issues found in this section will not be listed in future known issues documents for this product.
There are currently no issues to list.
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