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NI-FlexRIO 2025 Q2 Known Issues

Created Apr 22, 2025

Overview

This document contains the NI-FlexRIO known issues that were discovered before and since the release of NI-FlexRIO 2025 Q2. Known issues are performance issues or technical bugs that NI has acknowledged exist within this version of the product.

 

Not every issue known to NI appears on this list; it is intended to show the most severe and common issues that you may encounter and provide workarounds when possible. Other technical issues that you may encounter could occur through normal product use or system compatibility issues. You may find more information on these issues in NI’s Product Documentation, Knowledgebase, or Community; see Additional Resources.

Bug Number

Legacy ID

Description

Details
230875 596974

When synchronizing multiple NI 5752 or NI 5752B FlexRIO Adapter Modules there may be one sample of uncertainty.

Due to a known issue in the constraints of the CLIPs for the NI 5752 and 5752B FlexRIO Adapter Modules there may be one sample of uncertainty when attempting to send the AdcTgcStart signal to the ADCs on the adapter modules. This may cause the gain sweep to start at different samples between adapter modules.

Workaround:

There is currently no known workaround for this issue.

Reported Version:

FlexRIO: 16.0

Resolved Version:

N/A

Added:

N/A
883400 545599

The Controller for FlexRIO (NI-793XR) does not support debugging FPGA VIs using a third-party simulator.

The Controller for FlexRIO (NI-793XR) does not support the use of a third-party simulator to simulate and debug a LabVIEW FPGA VI.

Workaround:

There is currently no known workaround for this issue.

Reported Version:

FlexRIO: 16.0 | NI-793xR: 15.1

Resolved Version:

N/A

Added:

N/A
891271 554346

The Aurora CLIP shipped with the NI-793xR - MGT Aurora CLIP example may fail to initialize.

A design using the Aurora CLIP from the NI-793xR - MGT Aurora CLIP example project may fail to initialize after downloading a bitfile or resetting the FPGA.

Workaround:

Use the status signals on the Aurora CLIP to determine if an error occurred and re-download the bitfile until the CLIP initializes without an error.

Reported Version:

FlexRIO: 16.0

Resolved Version:

N/A

Added:

N/A
889041 555601

DRAM on NI PXIe-797xR FlexRIO FPGA Modules is inaccessible immediately after a download or reset of the FPGA.

DRAM on NI PXIe-797xR FlexRIO FPGA Modules is inaccessible immediately after a download or reset of the FPGA. A wait of at least 2.5 seconds must be added before before accessing the DRAM after an FPGA download or reset.

Workaround:

After any reset or download of the FPGA, wait at least 2.5 seconds before accessing the DRAM.

Reported Version:

FlexRIO: 16.0 | PXIe-797xR: 15.0

Resolved Version:

N/A

Added:

N/A
531101 526736

In the Streaming instrument design library, Wait For Stream.vi can return an incorrect value for the Samples Transferred output when an FPGA target is executed in simulation mode.

In the Streaming instrument design library, due to a race condition present only in simulation mode, Wait For Stream.vi can return the second to last Samples Transferred value rather than the expected terminal value of a finite transfer.

Workaround:

Do not use the Samples Transferred output from Wait For Stream.vi as the value for the Requested Elements input on a DMA FIFO when completing a finite transfer.

Reported Version:

FlexRIO: 14.0

Resolved Version:

N/A

Added:

N/A
531617 624455

In the "NI 5783 - Getting Started" example, Data Clock setting is 125 MHz single frequency, which is inconsistent with x2 Data Clock (200 MHz).

In the "NI 5783 - Getting Started" example, Data Clock setting is 125 MHz single frequency, which is inconsistent with x2 Data Clock (200 MHz). This inconsistency leads to a compilation error for certain IPs that require Data Clock and x2 Data Clock for overclocking. The error notes that the frequency is not within the requested range for the target.

Workaround:

Reload NI 5783 CLIP by disabling NI 5783 FAM and re-enabling NI 5783 FAM.

Reported Version:

FlexRIO: 16.1

Resolved Version:

N/A

Added:

N/A
531516 722379

Premature overflow of dynamically arbitrated DRAM FIFO

When the DRAM FIFO process VI is set to "dynamic (priority writes)" and the "from DRAM" queue is full there is a chance that the FIFO prematurely overflows.

Workaround:

Set the dynamic arbitration setting to "none" and use the "read grant time" and "write grant time" to arbitrate throughput.

Reported Version:

FlexRIO: 18.6

Resolved Version:

N/A

Added:

N/A
1042857

Estimated timing and final timing are grayed out in the Compilation window for the NI-7935

After a successful FPGA compilation for a NI-7935, the Estimated timing and Final timing tabs in the FPGA Compilation Status window are grayed out and not selectable.

Workaround:

The FPGA compilation would fail if the desired timing constraints are not met. A successful compilation means your timing constraints were met. To manually verify successful compilation for clock timing constraints, you can check the FPGA compilation output XML file. The Route_Twx section will list PASS for clocks listed that successfully meet the timing constraints. The XML file is located here: C:\NIFPGA\compilation\<compilation job folder>\output_files.zip\lvParsedReports.xml

Reported Version:

FlexRIO: 18.7

Resolved Version:

N/A

Added:

Jan 8, 2021
2051624

NI-148X Getting Started Example Has a Broken VI

The 148X getting started example has a broken VI:
<lvdir>\ProjectTemplates\Source\FlexRIO\NI148X\Getting Started\Host\Common\API\Display Images.vi. The VI displays an error message - "The refnum that is being passed into this node is not fully defined."

Workaround:

Removing and rewiring the purple 'display images' wire will fix the broken run arrow.

Reported Version:

FlexRIO: 2022 Q3

Resolved Version:

N/A

Added:

Aug 16, 2022
939637

Compiling a bitfile with the NI 6589 Serdes CLIP will fail with error Initialization time cannot be greater than 49 ms

The Connector Serdes and Channel Serdes CLIPs for the 6589 all have incorrect lower frequency ranges for the CLIP clocks: Acq Regional, Gen Regional and PFI Regional. The lower frequency is 1 Hz - if you try to compile with that frequency LabVIEW throws error 61499 during code gen:
"LabVIEW FPGA: An internal software error in the LabVIEW FPGA Module has occurred.  Please contact National Instruments technical support at ni.com/support.
 
Additional Information: Initialization time cannot be greater than 49 ms."

Workaround:

- Open LabVIEW
- Go to NI 6589 Examples

o  If you want to work with <Serdes Channel> in your future application,
Select: NI 6589 Serial Generation - Export Clock
o  If you want to work with <Serdes Connector> in your future application,
Select: NI 6589 Finite Acquisition - External Clock Start Trigger

-  ! NEVER Right Click on the IO Module and Select Properties!
-  Remove Unused FPGA Targets from Project and create a *.zip file of entire Project and save it somewhere you prefer
-  Open up the Example VI and change it to preferred Code
-  Generate Intermediate Files, Build Bitfile

-  Create a New Project (Referring as your Application Project)
-  Add your physical Target 7975R
-  Enable NI 6589 Module, Select Serdes Connector
-  On Host Vi, Right Click on <Configure FPGA Reference> and Choose the compiled FPGA bitfile from the other project

Reported Version:

FlexRIO: 19.1

Resolved Version:

N/A

Added:

Aug 16, 2022

Compiling a Bitfile for 57xx Devices on LabVIEW 2022 Q3 May Result in a Pulse Width Violation

Compiling a bitfile for 57xx devices, where 57XX is 5763, 5764, 5775, 5785, 5745, or 5774 on LabVIEW 2022 Q3, may result in a Pulse Width Violation.

Workaround:

Retry the bitfile compilation.

Reported Version:

FlexRIO: 2022 Q3

Resolved Version:

N/A

Added:

Aug 16, 2022
2242884

PXIe-1486 and 1487 unable to perform I2C Tap Passthrough on Channels 1 and 2 with GSE

Due to a known issue in the getting started example the PXIe-1486 and 1487 are unable to perform I2C Tap Passthrough with Channels 1 and 2.

Workaround:

Please reach out to NI support for assistance in a workaround.

Reported Version:

FlexRIO: 2022 Q3

Resolved Version:

N/A

Added:

Feb 21, 2023

PXIe-1487 with MAX96717F Serializer Appears as PXIe-7993 in NI MAX

PXIe-1487s with a MAX96717F Serializer will appear in NI MAX as a PXIe-7993 instead, this is a cosmetic issue and does not affect functionality or performance of the module.

Note: All other variants of the PXIe-1487 will appear with the correct name in NI MAX

Workaround:

To verify your PXIe-1487 is functioning properly, please deploy and run the GSE and associated bitfile on the device.

Reported Version:

FlexRIO: 2023 Q1

Resolved Version:

N/A

Added:

Feb 21, 2023
2296986, 2348644

PXIe-7903 or PXIe-6954 will fail to compile a bitfile if LabVIEW is not run in administrator mode

When run from LabVIEW without administrator privileges, PXIe-7903 or PXIe-6954 FPGA applications will fail to compile bitfiles in the codegen step due to permissions error copying files to the lvaddons directory. 

Workaround:

Run LabVIEW in Administrator mode when compiling bitfiles.

Reported Version:

FlexRIO: 2023 Q1

Resolved Version:

N/A

Added:

Oct 12, 2023
2349383

PXIe-7903 100GbE example does not respond to ARP requests

The PXIe 100GbE example doesn't respond to ARP requests sent to it by connected systems. This can manifest as data sent to a Sasquatch not being received, because the connected system doesn't know where to send the data.

Workaround:

Manually configure the ARP table of the system connected to the Sasquatch. On Windows this can be done with the command `arp -s <sasquatch IP> <sasquatch MAC> <IP of sending NIC>`. e.g. `arp -s 169.254.122.138 01-02-03-04-05-06 169.254.122.137`

Reported Version:

FlexRIO: 2023 Q2

Resolved Version:

N/A

Added:

Oct 12, 2023

PXIe-7890 Errors when Being Added as a Target in LabVIEW 2021

Adding a PXIe-7890 may report an error when being added as a target in LabVIEW 2021. The error message will be "An internal software error has occurred in LabVIEW FPGA". 

Workaround:

There are 2 possible workarounds -
  1. Use LabVIEW 2023 Q1 or later instead of LabVIEW 2021
  2. On a fresh system, first install LabVIEW 2023 Q1 or later on the system, followed by LabVIEW 2021 and the FlexRIO driver. This will enable using LabVIEW 2021 and the FlexRIO driver to add a PXIe-7890 as a target

    Reported Version:

    FlexRIO: 2023 Q2

    Resolved Version:

    N/A

    Added:

    Oct 12, 2023
    2839197

    Loading a new bitfile when running NI Linux RT on a PXIe-88x2 controller may crash the system, and the device may disappear from MAX

    Loading a new bitfile on FlexRIO with Integrated IO devices when running NI Linux RT on a PXIe-88x2 controller may crash the system, and the device may disappear from MAX.

    Workaround:

    Solution: Update the PXIe controller firmware to the latest version from from https://www.ni.com/en/support/downloads/software-products/download.pxie-8862-8842-8822-firmware-and-additional-drivers.html 

    Reported Version:

    FlexRIO: 2024 Q3

    Resolved Version:

    N/A

    Added:

    Oct 31, 2024
    1210589, 2256290

    NI-FlexRIO devices may fail under Linux kernel DMA remapping

    Attempts to use NI devices may fail on Linux kernels that have enabled DMA remapping.  The Linux kernel logs will contain errors similar to the following:
    DMAR: [DMA Read NO_PASID] Request device [06:00.0] fault addr 0xb8441000 [fault reason 0x06] PTE Read access is not set
    Linux distributions that enable DMA remapping by default include Ubuntu 22.04 with kernel 6.8 or higher and Ubuntu 24.04.

    Workaround:

    Modify the Linux kernel DMA remapping configuration as outlined in https://www.ni.com/r/iommu-linux.

    Reported Version:

    FlexRIO: 20.0

    Resolved Version:

    N/A

    Added:

    Oct 31, 2024

    Final Time Issue Listed

    Issues found in this section will not be listed in future known issues documents for this product.

    There are currently no issues to list.

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    Glossary of Terms

     

    • Bug ID - When an issue is reported to NI, you may be given this ID or find it on ni.com.  You may also find IDs posted by NI on the discussion forums or in KnowledgeBase articles.
    • Legacy ID – An older issue ID that refers to the same issue.  You may instead find this issue ID in older known issues documents.
    • Description - A few sentences which describe the problem. The brief description given does not necessarily describe the problem in full detail.
    • Workaround - Possible ways to work around the problem.
    • Reported Version - The earliest version in which the issue was reported.
    • Resolved Version - Version in which the issue was resolved or was no longer applicable. "N/A" indicates that the issue has not been resolved.
    • Date Added - The date the issue was added to the document (not the reported date).