Many instrumentation applications require system timing capabilities that cannot be implemented directly across standard ISA, PCI, or CompactPCI backplanes. PXI modular instrumentation adds a dedicated system reference clock, PXI trigger bus, star trigger bus, and slot-to-slot local bus to address the need for advanced timing, synchronization, and side-band communication (see Figure 2). PXI adds these instrumentation features while maintaining all PCI bus advantages.
System Reference Clock
The PXI backplane provides a built-in common reference clock for synchronization of multiple modules in a measurement or control system. Each peripheral slot features a 10 MHz TTL clock, transmitted on equal-length traces, providing skew of < 1 ns between slots. The accuracy of the 10 MHz clock is chassis specific, but is typically less than 25 parts per million (ppm), making it a reliable clock for synchronization based on phase lock looping (PLL) methods. For example, multiple 100 MHz digitizers are easily synchronized by phase-lock-loop of their individual voltage-controlled crystal oscillator (VCXO) 100 MHz clocks to the 10 MHz system reference clock. The accuracy of the 10 MHz clock can be improved by installing a capable board into the star trigger slot (slot 2) of the chassis. For example, placing a NI PXI-6608 into slot 2 will reduce the clock error to less than 75 parts per billion (ppb) by driving a high-accuracy 10 MHz clock to the backplane.
PXI Trigger Bus
PXI defines eight trigger bus lines for synchronization and communication between modules. Trigger, clock, and handshaking signals can be shared using the trigger bus lines. Triggers can be passed from one module to any number of modules, so you can distribute digital trigger signals from master to slave measurement devices. The trigger bus allows transmission of variable frequency sampling clocks, so multiple modules can directly share a sample clock or variable frequency time base. For example, four data acquisition (DAQ) modules using a 44.1 Ksps CD audio sampling rate can directly share a clock that is a multiple of 44.1 KHz over the trigger bus. However, for clock frequencies of approximately 20 MHz or greater, direct transmission of a clock with the trigger bus is not recommended due to signal degradation, and you should use a system reference clock instead.
Star Trigger Bus
The star trigger bus has an independent trigger line for each slot oriented in a star configuration from a special star trigger slot (defined as slot 2 in any PXI chassis). The PXI star line lengths are matched in propagation delay to within 1 ns from the star trigger slot. This feature addresses high-speed synchronization where you can distribute start/stop trigger signals from the master measurement module in the star trigger slot with low delay and skew. Alternately, a variable-frequency clock signal can be transmitted to modules over the star trigger bus with < 1 ns skew.
The PXI local bus is a daisy-chained bus that connects each peripheral slot with its adjacent peripheral slots to the left and right. Thus, a given peripheral slot’s right local bus connects to the adjacent slot’s left local bus, and so on. Each local bus, which is 13 lines wide, can pass analog signals as high as 42 V between cards or provide a high-speed side-band communication path that
does not affect the PCI bandwidth.
PXI offers the same performance features defined by the desktop PCI specification, with one notable exception. PXI and CompactPCI systems can have up to seven peripheral slots per bus segment, whereas most desktop PCI systems offer only three. Otherwise, all PCI features apply to PXI/CompactPCI:
- 33 MHz performance
- 32 and 64-bit data transfers
- 132 Mbytes/s (32-bit) and 264 Mbytes/s (64-bit) peak data rates
- System expansion via PCI-PCI bridges
- 3.3 V migration
- Plug and Play capability
PXI Express not only retains the timing and synchronization features of PXI, but it also adds several new synchronization features by taking advantage of the existing differential connectors required in PXI and technological advances that provide higher performance, low-cost differential signaling. Building on existing PXI capabilities, PXI Express provides the additional timing and synchronization features of a differential system clock, differential signaling, and differential star triggers. By using differential clocking and synchronization, PXI Express systems benefit from increased noise immunity for instrumentation clocks and the ability to transmit at higher frequency clocks. In addition to allowing engineers to improve the performance of the system, high-frequency clocks also match well with modern processes and allow lower cost products to remove clock multiplication circuits.