LabVIEW 2015 and 2015 SP1 FPGA Module Known Issues

Overview

This document contains the LabVIEW 2015 and 2015 SP1 FPGA Module known issues that were discovered before and since the release of LabVIEW 2015 FPGA Module. Not every issue known to NI will appear on this list; it is intended to only show the severe and more common issues that can be encountered.

The LabVIEW 2015 Platform Known Issues contains a full listing of known issues, including LabVIEW toolkits and modules.

Known Issues by Date

The following items are known issues in LabVIEW FPGA 2015 and 2015 SP1 sorted by Date.

495744VIs Remain Open After Closing Project If Project Contains a DMA FIFO that has a FXP Data Type
512546FPGA Compilations Hangs During In Place Phase using Vivado Compilation Tools with USB-7856R
527080Generating Simulation Libraries for QuestaSim Throws LabVIEW Error that Libraries Are Out of Date
576926Quadrature Decoder.lvproj in NI Example Finder Does Not Appear Under CompactRIO Category
577377FPGA User-Controlled I/O Sampling Nodes are Broken in Japanese Version of LabVIEW 2015 and LabVIEW 2015 SP1
725737Digital Output timing outside of Single-Cycle Timed Loops has extra delay


IDKnown Issue
495744

Return
VIs Remain Open After Closing Project If Project Contains a DMA FIFO that has a FXP Data Type
Any LabVIEW 2014 project which contains a DMA FIFO that is either (Host to Target or Target to Host) that has a FXP data type will cause any VI opened from the project to remain open after the project has been closed.

Workaround: Close VIs manually.

Reported Version: 2014  Resolved Version: 2016  Added: 10/09/2015
512546

Return
FPGA Compilations Hangs During In Place Phase using Vivado Compilation Tools with USB-7856R
When you compile an FPGA design on Vivado targets, specifically the USB-7856R, the compilation hangs during the in place phase.

Workaround: There are currently two workarounds:
1. On the build specification's properties page, go to "Xilinx Options" category, uncheck the "Build using multiple-threads, if available" check box
2. Use the LabVIEW FPGA Cloud Compile Service to compile your design

Reported Version: 2015  Resolved Version: 2016  Added: 03/08/2016
527080

Return
Generating Simulation Libraries for QuestaSim Throws LabVIEW Error that Libraries Are Out of Date
When using LabVIEW FPGA and QuestaSim as a simulator in 2015 and 2015 SP1, LabVIEW will ask to generate the simulation libraries again because the libraries are out of date. This only occurs when the development system has the Vivado Compile Tools installed and not the Xilinx ISE Compile Tools. The files are correctly generated.

Workaround: Ignore error or installed Xilinx ISE Compile Tools to ignore the error.

Reported Version: 2015  Resolved Version: N/A  Added: 03/08/2016
576926

Return
Quadrature Decoder.lvproj in NI Example Finder Does Not Appear Under CompactRIO Category
When browsing for the Quadrature Decoder Example in the NI Example Finder, the example can normally be found underneath the CompactRIO category. Searching in LabVIEW 2015 or LabVIEW 2015 SP1, the example does not appear.

Workaround: Search for the example or find it underneath Toolkits and Modules » FPGA » CompactRIO » Signal Generation and Processing » Digital » Quadrature Encoding

Reported Version: 2015  Resolved Version: 2017  Added: 03/08/2016
577377

Return
FPGA User-Controlled I/O Sampling Nodes are Broken in Japanese Version of LabVIEW 2015 and LabVIEW 2015 SP1
FPGA User-Controlled I/O Sampling nodes in the Japanese version of LabVIEW 2015 or 2015 SP1 returns an "unexpected XNode error" dialogue.

Workaround: Use the LabVIEW 2014 Japanese version or English version of LabVIEW 2015.

Reported Version: 2015  Resolved Version: 2016  Added: 03/17/2016
725737

Return
Digital Output timing outside of Single-Cycle Timed Loops has extra delay
In LabVIEW 2014 SP1 FPGA and earlier, using Digital Outputs outside of a Single-Cycle Timed Loop would result in the output taking only a single cycle of the FPGA Base Clock to execute. Currently this takes several additional clock cycles.

Workaround: Move Digital Outputs which have tight timing requirements into Single-Cycle Timed Loops.

Reported Version: 2015  Resolved Version: N/A  Added: 01/23/2019

 

Known Issues by Category

The following items are known issues in LabVIEW FPGA 2015 and 2015 SP1 sorted by Category.

Example Programs
576926Quadrature Decoder.lvproj in NI Example Finder Does Not Appear Under CompactRIO Category
Functions, VIs, and Express VIs
495744VIs Remain Open After Closing Project If Project Contains a DMA FIFO that has a FXP Data Type
512546FPGA Compilations Hangs During In Place Phase using Vivado Compilation Tools with USB-7856R
577377FPGA User-Controlled I/O Sampling Nodes are Broken in Japanese Version of LabVIEW 2015 and LabVIEW 2015 SP1
IP Builder
527080Generating Simulation Libraries for QuestaSim Throws LabVIEW Error that Libraries Are Out of Date
Miscellaneous
725737Digital Output timing outside of Single-Cycle Timed Loops has extra delay

 

IDKnown Issue
Example Programs
576926

Return
Quadrature Decoder.lvproj in NI Example Finder Does Not Appear Under CompactRIO Category
When browsing for the Quadrature Decoder Example in the NI Example Finder, the example can normally be found underneath the CompactRIO category. Searching in LabVIEW 2015 or LabVIEW 2015 SP1, the example does not appear.

Workaround: Search for the example or find it underneath Toolkits and Modules » FPGA » CompactRIO » Signal Generation and Processing » Digital » Quadrature Encoding

Reported Version: 2015  Resolved Version: 2017  Added: 03/08/2016
Functions, VIs, and Express VIs
495744

Return
VIs Remain Open After Closing Project If Project Contains a DMA FIFO that has a FXP Data Type
Any LabVIEW 2014 project which contains a DMA FIFO that is either (Host to Target or Target to Host) that has a FXP data type will cause any VI opened from the project to remain open after the project has been closed.

Workaround: Close VIs manually.

Reported Version: 2014  Resolved Version: 2016  Added: 10/09/2015
512546

Return
FPGA Compilations Hangs During In Place Phase using Vivado Compilation Tools with USB-7856R
When you compile an FPGA design on Vivado targets, specifically the USB-7856R, the compilation hangs during the in place phase.

Workaround: There are currently two workarounds:
1. On the build specification's properties page, go to "Xilinx Options" category, uncheck the "Build using multiple-threads, if available" check box
2. Use the LabVIEW FPGA Cloud Compile Service to compile your design

Reported Version: 2015  Resolved Version: 2016  Added: 03/08/2016
577377

Return
FPGA User-Controlled I/O Sampling Nodes are Broken in Japanese Version of LabVIEW 2015 and LabVIEW 2015 SP1
FPGA User-Controlled I/O Sampling nodes in the Japanese version of LabVIEW 2015 or 2015 SP1 returns an "unexpected XNode error" dialogue.

Workaround: Use the LabVIEW 2014 Japanese version or English version of LabVIEW 2015.

Reported Version: 2015  Resolved Version: 2016  Added: 03/17/2016
IP Builder
527080

Return
Generating Simulation Libraries for QuestaSim Throws LabVIEW Error that Libraries Are Out of Date
When using LabVIEW FPGA and QuestaSim as a simulator in 2015 and 2015 SP1, LabVIEW will ask to generate the simulation libraries again because the libraries are out of date. This only occurs when the development system has the Vivado Compile Tools installed and not the Xilinx ISE Compile Tools. The files are correctly generated.

Workaround: Ignore error or installed Xilinx ISE Compile Tools to ignore the error.

Reported Version: 2015  Resolved Version: N/A  Added: 03/08/2016
Miscellaneous
725737

Return
Digital Output timing outside of Single-Cycle Timed Loops has extra delay
In LabVIEW 2014 SP1 FPGA and earlier, using Digital Outputs outside of a Single-Cycle Timed Loop would result in the output taking only a single cycle of the FPGA Base Clock to execute. Currently this takes several additional clock cycles.

Workaround: Move Digital Outputs which have tight timing requirements into Single-Cycle Timed Loops.

Reported Version: 2015  Resolved Version: N/A  Added: 01/23/2019

 

Glossary of Terms

 

  • Bug ID - When an issue is reported to NI, you may be given this ID or find it on ni.com.  You may also find IDs posted by NI on the discussion forums or in KnowledgeBase articles.
  • Legacy ID – An older issue ID that refers to the same issue.  You may instead find this issue ID in older known issues documents.
  • Description - A few sentences which describe the problem. The brief description given does not necessarily describe the problem in full detail.
  • Workaround - Possible ways to work around the problem.
  • Reported Version - The earliest version in which the issue was reported.
  • Resolved Version - Version in which the issue was resolved or was no longer applicable. "N/A" indicates that the issue has not been resolved.
  • Date Added - The date the issue was added to the document (not the reported date).