||This lesson introduces the USRP Software-Defined Radio Device for wireless prototyping using the LabVIEW Communications design environment. You will understand the challenges facing the wireless industry and some solutions for overcoming them. You also will explore the LabVIEW Communications environment and identify the components of a system architecture.
- Introduction to wireless prototyping methodology
- Introduction to LabVIEW communications
- Hardware architecture
- Project environment
|Building a VI
||In this lesson, you will learn how to build a VI in LabVIEW Communications. You will also learn about the tools to debug your VI and the text-based languages that are supported in the LabVIEW Communications environment.
- Components of a VI
- Objects on the panel
- Objects on the diagram
- Text-based design language
- VI debugging
|Data Transfer and Communication
||In this lesson, you will discover how to use the Data pane to store, retrieve, view, and analyze data. You also will learn the tools to programmatically create files and folder paths.
- Data pane
- File and folder paths
|Programming in Parallel
||This lesson covers best practices when programming in parallel loops. You will practice using duplicate terminals and queues to communicate data between loops.
- Parallel loops
- Duplicate terminals
|FPGA Programming with LabVIEW
||This lesson provides an overview of the different design languages for FPGA. You will understand the benefits and limitations of each language and how to select the language to use for a given scenario.
- Introduction to FPGA
- Using FPGA VIs
- FPGA host interface
- Data transfer with FIFOs
|Multirate Diagram and FPGA
||This lesson explores the Multirate Diagram in more detail and covers the ways in which it helps you iterate more quickly on your algorithm design.
- Using Multirate Diagrams
- Converting floating-point to fixed point
- Integrating Multirate diagrams with FPGA VIs
|Using Optimized FPGA VIs
||In this lesson, you will learn to use the timesaving and project-specific properties of Optimized FPGA VIs.
- Overview of the directed optimization of FPGA vis
- Optimized FPGA VI vs. Multirate Diagram
- Optimized FPGA VIs in other document types
|Designing with Clock-Driven Logic
||This lesson explains basic digital design theory and how to use data transfer and storage tools for synchronization. You will learn the different considerations for timing a digital signal, the reason to use FIFOs with clock-driven loops, and the purpose of handshaking.
- Clock-driven logic and quality of results
- Using FIFOs with clock-driven logic
- Host APIs
|Advanced Tips and Tricks
||This lesson presents some best practices for incorporating third-party FPGA tools and ensuring a successful compile.
- Using Xilinx IP
- Specialized nodes
- Successful compiles