In single-ended signals, a digital transmitter drives out one voltage (called VOL or Voltage Output Low) to represent a logic level ‘0’ and another voltage (called VOH or Voltage Output High) to represent a logic level ‘1’. Both of the VOH and VOL voltages are referenced to ground. At the single-ended digital receiver any voltage less than one voltage (called VIL or Voltage Input Low) is interpreted to represent a logic level ‘0’, and any voltage greater than a voltage (called VIH or Voltage Input High) is interpreted to represent a logic level ‘1’.
TTL (Transistor – Transistor Logic) logic is a single-ended signal, where VOL is equal to ground and VOH is commonly 3.3V or 5V. The difference between VOH and VIH and the difference between VOL and VIL is the NIM (Noise Immunity Margin). The NIM determines how much noise can be on the digital signal before the receiver cannot correctly receive the digital signal.
Figure 1 – Single Ended Signal
Differential Signals take two wires configured as a pair, instead of 1 wire and a ground to transmit digital signals. Differential signals have one distinct advantage: they are immune not most types of signal noise. The receiver interprets the signals based on the voltage difference between the pair of signal – not based on a reference to ground. For the differential digital signal to be received as a logical ‘0’, the V+ signal must be less than the V- signal by more than Vdiff.
Figure 2 – Differential Signal
The digital driver still drives out two voltages, VOH and VOL as in the single-ended case. This Vdiff is specified by the particular voltage standard. For example, the Vdiff for LVDS is 100mV. While differential signals are not specifically referenced to ground like single-ended signals, they are generally limited in the range of valid voltages. This is usually specific in terms of the midpoint or average of the two voltage levels and is called the common mode voltage (VCM).
Some kinds of differential signals are LVDS (Low Voltage Differential Signal), ECL (Emitter Coupled Logic), PECL (Positive Emitter Coupled Logic) and RS-422.
LVDS transmits two different voltages which are compared at the receiver. LVDS uses this difference in voltage between the two wires to encode the information. The transmitter injects a small current, nominally 3.5 mA, into one wire or the other, depending on the logic level to be sent. The current passes through a resistor of about 100 to 120 Ω (matched to the characteristic impedance of the cable) at the receiving end, and then returns in the opposite direction along the other wire. From Ohm's law, the voltage difference across the resistor is therefore about 350 mV. The receiver senses the polarity of this voltage to determine the logic level. This type of signaling is called a current loop.
Also see: Interfacing to LVDS with the NI 655X Digital Waveform Generator/Analyzer