System Configuration Effects on NI MXI-Express RIO Daisy-Chain Depth


This document explains several configuration constraints to help you find the right system that is compatible with MXI-Express hardware and software when using NI MXI-Express RIO expansion chassis.


You can find additional information regarding known setup and compatibility issues with MXI-Express in MXI-Express Compatibility and Connectivity Troubleshooting Guide.


MXI-Express is successfully used on a variety of NI MXI-Express controllers, PCs, and laptops containing a PCI Express or ExpressCard slot. Using a PCI Express interface assures maximum compatibility with drivers and applications. However, some system configurations impose constraints that limit the daisy-chain depth and maximum number of NI MXI-Express RIO chassis in a given system configuration.

System Configuration Constraints on NI MXI-Express RIO Daisy-Chain Depth

The following discusses several constraints that can limit the system configurations using the NI MXI-Express RIO expansion chassis.

Limitations Due to BIOS Enumeration Algorithms

It is the computer BIOS's responsibility to traverse the PCI topology at boot to assign memory, I/O space, and device numbers to the attached devices. However, more complex MXI-Express configurations may pose a challenge for the BIOS to correctly enumerate all of the resources necessary. If this situation occurs, some NI 915x devices may not be correctly discovered. To reduce the chances for incompatibility and to benefit from the latest BIOS improvements, always make sure that the BIOS on the system is the latest version from the vendor. For systems with BIOS enumeration difficulties, National Instruments provides MXI-Express BIOS Compatibility Software that works around common BIOS limitations.

OS Limitations on Daisy-Chain Depth

Legacy OS versions can also limit the daisy-chain depth allowed for NI 915x devices. Windows XP and Windows Vista can limit the depth to five devices in a chain. If a greater depth is necessary, it is recommended to use the latest OS version available with NI 915x devices. However, if a greater number of NI 915x devices are required and the connection topology is not critical, then multiple chains from the upstream system may resolve connectivity requirements. A combination of the multiple chains from the host (a star topology) and daisy-chained chassis increase the connectivity while allowing systems to stay under the depth limitation imposed by legacy OS versions.

BIOS Limitation of PCI Express Bus Segments

The PCI specification governed by the PCI-SIG allows for up to 256 PCI buses for a single host. Most PXI systems do not approach this limit, even with many PCI-based motherboard resources and PXI chassis in use. However, some PC vendors may limit this number to less than 256 PCI buses, which can limit the number of NI 915x devices that can be used in the system. The KnowledgeBase article titled Determine the Number and Range of PCI/PCIe Root Bus Devices is a great resource to use when determining if a PC is at risk. 

NI 915x Specification Constraints on Daisy-Chain Depth

Beyond PC-based constraints, the NI 915x also has a maximum daisy-chain limit that is based on the electrical characteristics of NI 915x hardware. The maximum daisy-chain depth for NI 915x hardware is six devices. While some systems may be able to detect chains longer than six, proper operation is not guaranteed.

Additional Questions and Information

If you would like further explanation or have additional questions, contact National Instruments technical support at