VeriStand 2019 R3 Known Issues

Overview

This document contains the VeriStand 2019 R3 known issues that were discovered before and since the release of VeriStand 2019 R3. Known issues are performance issues or technical bugs that NI has acknowledged exist within this version of the product.

 

Not every issue known to NI appears on this list; it is intended to show the most severe and common issues that you may encounter and provide workarounds when possible. Other technical issues that you may encounter could occur through normal product use or system compatibility issues. You may find more information on these issues in NI’s Product Documentation, Knowledgebase, or Community.

Contents

Known Issues

 

Final Time Issue Listed

Issues found in this section will not be listed in future known issues documents for this product.
There are currently no issues to list.

Additional Resources

Explore Support Content and Product Documentation 

 

Ask the NI Community

 

Request Support from an Engineer

A valid service agreement may be required, and support options vary by country

Bug ID Legacy ID Description Details
917145 720821

System Definition File Error Using Inline Timing and Sync Custom Device

When using the Custom Device Template Tool to create an Inline Timing and Sync Custom Device, importing the device creates a "Timing Source Init VI_1" section in the System Definition XML. This section causes error -307832 when adding the Inline Timing and Sync Custom Device.

Workaround: Open the VeriStand project's .nivssdf file with a text editor, and delete the "Timing Source Init VI_1" section.

Reported Version: 
VeriStand 2018

Resolved Version: 
N/A

Added:
1/17/2020

917158 572887

Setting the Frame Type Option in the Raw Data Frame Configuration Page Has no Effect

As the frame type is pulled from the XNET database, the system definition setting does not affect the XNET configuration.

Workaround: Set the frame type in the XNET database. Do not use the Raw Data Frame Type Configuration option in the system definition.

Reported Version: 
VeriStand 2014

Resolved Version: 
N/A

Added:
1/17/2020

917213 522678

Adding an FPGA Target to the System Definition via the API Will Fail to Add the Parameters Section of PWM Channels

When using the System Definition API to add an FPGA target to a system definition file, the Parameters section typically included with PWM channels is excluded.

Workaround: Add the FPGA target manually to the system definition using System Explorer.

Reported Version: 
VeriStand 2014

Resolved Version: 
N/A

Added:
1/17/2020

959045  

Old Screens Fail to Load if They Have a RT Sequence Control Using Parameters

Workaround: Recreate the screen.

Reported Version: 
VeriStand 2019 R3

Resolved Version: 
N/A

Added:
1/17/2020

959051  

RT Sequence Control in a Cluster Interaction Causes VeriStand UI to Crash

After saving and closing a project with a RT Sequence Control in a cluster, opening the project and interacting with that control will cause the VeriStand UI crash.

Workaround: Do not place a RT Sequence Control in a cluster.

Reported Version: 
VeriStand 2018 SP1

Resolved Version: 
N/A

Added:
1/17/2020

Glossary of Terms

 

  • Bug ID - When an issue is reported to NI, you may be given this ID or find it on ni.com.  You may also find IDs posted by NI on the discussion forums or in KnowledgeBase articles.
  • Legacy ID – An older issue ID that refers to the same issue.  You may instead find this issue ID in older known issues documents.
  • Description - A few sentences which describe the problem. The brief description given does not necessarily describe the problem in full detail.
  • Workaround - Possible ways to work around the problem.
  • Reported Version - The earliest version in which the issue was reported.
  • Resolved Version - Version in which the issue was resolved or was no longer applicable. "N/A" indicates that the issue has not been resolved.
  • Date Added - The date the issue was added to the document (not the reported date).