High-level software tools (NI LabVIEW, the LabVIEW FPGA and LabVIEW Real-Time modules, and NI Multisim software), combined with an embedded controller and a user-programmable FPGA, offer the rapid development and testing of control algorithms for power electronics control applications. Tight integration between the software environment and hardware components provides a cost-effective, lower-risk path to high-volume commercial deployment for next-generation, FPGA-based digital energy conversion systems. The NI Single-Board RIO general-purpose inverter controller (GPIC) provides a direct path to achieve the following business goals:
Designing a full-custom controller board for an embedded system takes, on average, 12 to 13 months (based on a 2012 embedded market study). However, with the NI CompactRIO GPIC, you can reduce your engineering cost and risk by taking advantage of an off-the-shelf board with all necessary I/O for power electronics control and the latest FPGA and real-time-processor technology. By customizing through software and hardware, you gain the advantages of an off-the-shelf platform while truly maintaining the ability to customize your design to your exact requirements.
National Instruments has strategic partnerships with leading technology entities such as Xilinx, Freescale, Linux, and Intel to include the latest chipsets and technologies in the GPIC, guaranteeing the most up-to-date and quality technology.
In addition, you can significantly reduce the cost of custom hardware design and increase your product reliability by taking advantage of NI’s high-volume production capabilities and years of manufacturing experience. With flexible, volume-based pricing, NI can meet your controller-board price point so that you can meet your profit margin requirements.
The GPIC hardware is tightly integrated with LabVIEW graphical system design tools for the rapid development and validation of power electronics control algorithms. Using the LabVIEW graphical system design toolchain, you can reduce the time and risk associated with a complete embedded design by improving design efficiency. LabVIEW provides a unified graphical system design environment for all product development stages. This means that you can use the same control source code across every phase of design, test, and deployment.
At the highest level, FPGAs are reprogrammable silicon boards containing a matrix of reconfigurable gate-array logic circuitry. Unlike DSPs, FPGAs are not constrained by a specific set of instructions or hardwired processing units. Using prebuilt logic blocks and programmable routing resources, you can configure these boards for your specific power electronics control application. In the past, implementing a DSP application (such as a PWM inverter control algorithm) on an FPGA typically took much more effort than implementing the same application on a DSP. It required familiarity with hardware description languages (HDLs) for programming the FPGA board. In addition, it required designing a custom I/O board to interface with the FPGA.
The GPIC addresses those challenges by providing an off-the-shelf board with all of the I/O you need for power electronics control, which you can program using the LabVIEW FPGA graphical environment. With LabVIEW FPGA graphical programming, you can define the logic in an FPGA board without knowledge of low-level HDLs (such as VHDL or Verilog) or board-level hardware design. In addition, LabVIEW FPGA abstracts away complicated tasks such as timing constraints, I/O configuration, and place and route settings.
Figure 3. Using LabVIEW FPGA to Design an FPGA Board
With LabVIEW FPGA, you can integrate existing VHDL code, third-party IP, or IP cores from the Power Electronics IP Library into your LabVIEW FPGA application, so you can focus on application-specific features and code segments and use prebuilt cores for common tasks such as PWM, proportional integral derivative control, and Clarke and Park transforms. For example, Figure 4 shows the performance improvement of an application-optimized FPGA-based PWM control versus a standard PWM block found in DSP boards:
Figure 4. An optimized PWM in an FPGA can reduce the total harmonic distortion by nearly 50 percent at a high modulation index, compared to the standard PWM in DSP blocks.
The ability to import code and reconfigure the functionality of the FPGA is especially beneficial for smart grid applications from the perspective of long-term support, maintenance, and interoperability with evolving standards and communication protocols. The reconfigurable nature of the FPGA means you can achieve high performance, reduce application development time, and reuse code.
FPGAs have a highly parallel architecture, so they exceed DSP computing power. In fact, modern FPGAs contain dedicated DSP cores that are best-suited for typical DSP applications. Xilinx Zynq-7020 SoCs have 220 dedicated, full-custom, low-power DSP cores to combine high speed with small size while retaining system design flexibility.
Figure 5. Parallel Execution in FPGA vs. Sequential Execution in DSP
When you compile your power electronics control application (custom high-frequency digital PWMs) for an FPGA device, the result is a highly optimized silicon implementation that provides true parallel processing with the performance and reliability benefits of dedicated hardware circuitry. Because there is no OS on the FPGA board, the code is implemented in a way that ensures maximum performance and reliability.
Completely parallel execution of control, integrated DSP cores, and protection interlocks eliminate competition for shared resources and simplify scalability of the application as it grows. The highly parallel nature of FPGA data processing results in an order-of-magnitude increase in performance per dollar, compared to single-core DSPs.
Figure 6. The incorporation of hardcore DSPs into the FPGA fabric has dramatically increased the performance of FPGAs, compared to single-core DSPs, as measured in multiply-accumulate (MAC) operations per second.
With the NI Single-Board RIO GPIC commercial off-the-shelf controller board, you can take advantage of FPGA performance and reliability with relatively low nonrecurring engineering, compared to custom hardware design.
In addition, you can increase your product differentiation by taking advantage of the data analysis and communication capabilities of a Dual-core ARM Cortex-A9 MPCore processor running Linux RT. LabVIEW contains built-in data transfer mechanisms to pass data from the I/O to the FPGA, and from the FPGA to the embedded processor for real-time analysis, post-processing, data logging, and communication to a networked host computer.
With an extensive library of prebuilt LabVIEW IP functions, you can create a smart power electronics controller for smart-grid protocol communication, event recording and alarming, web monitoring, and electrical power analysis
The LabVIEW graphical system design toolchain significantly reduces your development time and optimizes the size of your engineering design team. Table 2 shows that the development time of a typical embedded system is reduced by half when using the LabVIEW graphical system design toolchain versus traditional tools. Additionally, a team of five engineers (versus 12 with the traditional design approach) produced a complete embedded design.
Table 2. Effectiveness and Efficiencies of LabVIEW Versus General Market Based on a 2012 Embedded Market Study
LabVIEW graphical system design tools are the main reason for these dramatic improvements in design efficiency. These tools simplify the design process at all stages of development—from design to prototype to deployment—by abstracting the complexity of low-level development at different design stages.
The graphical system design approach begins with co-simulation, where you develop LabVIEW FPGA code within a high-fidelity simulation environment that captures the interaction between the digital control system and analog power electronics. LabVIEW FPGA and the NI Multisim power electronics circuit simulator automatically adjust the simulation timestep to capture the fast transient behavior of the analog circuitry and its interaction with the FPGA-based control system. For example, if the current in an inductor is ringing, the simulation automatically slows down to capture the effect on the digital control system.
Figure 8: Co-simulation between Multisim and LabVIEW with automatic, variable time steps reduce time spent stitching together results from multiple simulations.
One of the main benefits of graphical FPGA logic representation versus low-level representation, which is common for traditional model-based design, is that LabVIEW FPGA code can be developed within the simulation environment and moved to a physical FPGA target with little effort for a completely bidirectional development path. Changes made to the software at any stage—from prototype to postproduction—automatically update anywhere that code is referenced in the toolchain.
The goal is to write the embedded systems code on day one and continually improve it throughout development. You can design the power electronics circuitry in parallel with the FPGA software and the automated test code to help you evaluate the nonlinear design trade-offs between energy efficiency, cost, and component lifetime. This creates the opportunity to optimize for multiple design goals simultaneously, even given difficult trade-offs.
Because the GPIC hardware is fully integrated into the graphical system design flow, you can focus your development resources on designing highly differentiated power converter control algorithms and minimize the time and resources spent on I/O interface design.