This white paper outlines recent innovations in the PXI platform: the industry’s first PXI Express embedded controller powered by an Intel Xeon 8-core processor and the industry’s first all-hybrid PXI chassis with PCI Express Gen 3 technology and matching system bandwidth. When combined, the chassis and controller deliver up to twice the processing power and system bandwidth compared with previous high-performance PXI platform components. With the modularity to meet evolving requirements, this combination makes PXI a zero-compromise solution for any test and measurement system.
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Figure 1. The PXIe-1085 24 GB/s chassis with PXIe-8880 Intel Xeon-based
embedded controller and various modular instruments
NI collaborated with Intel to deliver the server-class power of Intel Xeon processors to the test and measurement market. The PXIe-8880 embedded controller features eight cores, up to 24 GB of DDR4 memory and 24 lanes of PCI Express Gen 3 connectivity to the backplane. This gives engineers and scientists up to twice the processing power and bandwidth compared with previous generation controllers.
Figure 2. (Left) Teardown view of PXIe-8880 embedded controller with Intel Xeon processor exposed and 2-8 GB RAM upgrades;
(Right) Front view of the PXIe-8880 embedded controller with peripherals.
To understand the value of the new PXIe-8880 controller, consider the raw performance power of the CPU. Because most test and measurement systems are more computationally intensive than graphically intensive, we used more processor-centric CPU benchmarks. Chart 1 shows that the new PXIe-8880 with an 8-core Intel Xeon E5-2618L v3 processor performs 76 percent better than the previous generation PXIe-8135 quad-core Intel Core i7-3610QE processor in the CPU Mark benchmark.
Chart 1. The PXIe-8880 has a 76 percent CPU Mark performance improvement compared with the previous
generation PXIe-8135 embedded controller.
You also need to look at how the PXIe-8880 performs when used with test and measurement software, such as LabVIEW graphical system design software. A processor-intensive measurement that is commonly used in test and measurement is the fast Fourier transformation (FFT). In Chart 2 below, it can be seen that the new PXIe-8880 can compute 91 percent more FFTs than the previous generation PXIe-8135 quad-core Intel Core i7-3610QE processor in the benchmarked time window. Note that LabVIEW is a natively multithreading application software, so it highly leverages the eight cores of the Intel Xeon processor of the PXIe-8880 embedded controller.
Chart 2. The PXIe-8880 computes 91 percent more LabVIEW FFTs in compared
with the previous generation PXIe-8135 embedded controller.
“The use of the latest Intel Xeon processors is a new milestone for our collaboration with NI. The Internet of Things requires the highest possible processing power to reduce time to market and lower the cost of test, and NI’s approach with PXI is critical toward that goal.”
- Shahram Mehraban
Director, Market Development for Industrial IoT
With the release of the PXIe-839x family of remote control products, NI offers engineers more than double the bandwidth of previous solutions for host control from a desktop, workstation, or server. The PCIe-8398 host interface card communicates over 16 lanes of PCI Express Gen 3 connectivity to either the single-port PXIe-8398 or dual-port PXIe-8399 remote control module. Through modular cabling and/or use of the PXIe-8394 bus extension module, several daisy-chain and star topologies are also possible for high-throughput system expansion.
See the PXI Remote Control and System Expansion Product Flyer for additional information regarding multichassis topologies, and see Thunderbolt™ 3 Remote Control of PXI Test Systems for information regarding laptop control of PXI using PCI Express Gen 3 x4 connectivity.
Figure 3. The PXIe-8398 remote control module and PCIe-8398 host interface card
together connect a PXI Express chassis to a host PC.
Since the inception of the PXI standard in 1997, NI has played a key role in building a foundation for innovation by continually delivering a broad and high-performance chassis portfolio to meet the I/O point and performance needs of customer applications. With the latest chassis release, NI has delivered the first PXI chassis based on PCI Express Gen 3 technology to offer engineers twice the slot and system bandwidth of previous generation chassis.
Figure 4. Front view of a vacant PXIe-1085 24 GB/s chassis.
As the complexity of customer applications and demand for processing power and bandwidth have grown over the past decades, the PXI specification has evolved to meet these needs. Initially PXI was based on PCI technology and provided 132 MB/s of data bandwidth. This specification then evolved into PXI Express by leveraging PCI Express technology, which sends data serially through pairs of transmit and receive connections called lanes, which give data the ability transfer at 250 MB/s per direction with PCI Express Gen 1 technology. Multiple lanes are grouped together to form x4, x8 and x16 links to increase bandwidth.
This then grew to 500 MB/s per lane with PCI Express Gen 2 technology. With the release of the PXIe-1085 24 GB/s chassis, the industry’s first chassis that is based on PCI Express Gen 3 technology, the lane bandwidth has been doubled to 1 GB/s per lane, and with 24 data lanes (x24), a total of 24 GB/s of data per direction can be sent from the controller to the PXI Express backplane as seen in Chart 3 below.
It is important to note that the system bandwidth outlined in the previous paragraph addresses only the amount of data that can be transferred between the system controller and the chassis. When utilizing peer-to-peer (P2P) communication between peripheral modules, the total amount of data that can be transferred in the chassis increases dramatically. As an example, three peripheral modules streaming to system controller at 8 GB/s and seven pairs of modules utilizing P2P at 8GB/s, in theory, total system bandwidth becomes 80 GB/s in single direction and 160 GB/s bi-directionally. Actual system bandwidth will vary based on many factors such as memory bandwidth, PCIe packet sizes and overhead, single vs. bidirectional traffic, etc.
Chart 3. System bandwidth for each generation of PXI and PXI Express
based on the 24 available data lanes (x24).
Along with advancements in chassis communication buses to incorporate the latest PC technology, PXI peripheral modules have evolved from PXI to PXI Express to take advantage of PCI Express communication bus capabilities. To ensure module compatibility between PXI and PXI Express modules, the PXI specification added the hybrid slot. With this slot, you can insert hybrid-compatible PXI or PXI Express peripheral modules in PXI chassis and leverage any previous investments in hybrid-compatible PXI modules. As with the previous 12 GB/s PXIe-1085 chassis, the 24 GB/s variant is an 18-slot chassis (one system controller + 17 peripheral slots) with 16 hybrid slots.
A key benefit of the PXI platform over traditional instrumentation is the integration of triggering, power, reference clocks, and data buses, which normally require external cables, into the PXI chassis backplane. For the PXIe-1085 24 GB/s chassis based on PCI Express Gen 3 technology, the key innovation is the implementation of two Gen 3 switches as seen in Figure 5. These switches handle the routing of information from module to module and between the modules and controllers.
Figure 5. Rear view of the PXIe-1085 24 GB/s chassis with the power shuttle
removed to view the PCI Express Gen 3 switching technology.
A recent development in the PXI platform is the PXI MultiComputing (PXImc) specification, which allows two or more intelligent systems to exchange data via PCI Express. Previously, you could use the PXIe-8383 peripheral slot to physically connect to a remote processor, such as a workstation computer. The new PXIe-8830mc is an embedded coprocessing module that you can install directly into any PXI Express peripheral slot to quickly add processing power to your system. For example, in an 18-slot chassis, you can combine the PXIe-8880 with eight PXIe-8830mc coprocessing modules for a total of 40 physical cores.
Figure 6. A PXI system full of high-bandwidth, signal-processing intensive RF instrumentation and a
PXIe-8830mc coprocessing module in slots 6 and 7 to add four processing cores.
“Over the past two decades, we have witnessed a gradual shift from traditional instrumentation in favor of the PXI platform for automated test. With the addition of Intel Xeon processor technology, we expect the adoption of PXI to only increase for high-performance applications.”
- Jessy Cavazos
Industry Manager, Measurement and Instrumentation
Frost & Sullivan
In addition to the key application areas below, the new chassis and controller solutions are ideal for any computationally intensive or high-bandwidth test and measurement application, as well as any application that must scale into the future without sacrificing performance.
Since the implementation of the AMPS protocol in 1978, wireless communication protocols have continually demanded more bandwidth to transmit data. This means that the test systems built to validate the implementation of these protocols in devices must be able to acquire, analyze, and present large sets of data from instrumentation. With the average life span of five to seven years for a test system, wireless test engineers are adopting a modular approach to mitigate retooling costs to update software and hardware as each new protocol becomes implemented.
Though test systems for semiconductor, such as the NI Semiconductor Test System (STS), do not consume large sets of data, they do need to consume many sets of data in parallel to increase their test throughput, or part per hour. A big contributor for multi-site test throughput is the parallel test efficiency (PTE) of a test system, which is typically fixed for a system. But, for a modular approach such as the NI STS, the ability to add an 8-core Intel Xeon processor and powerful multicore test executive software like TestStand provides an economical approach for increasing PTE, and therefore production throughput for semiconductor test engineers.
Prototyping fifth-generation (5G) cellular systems requires intense signal processing, tight synchronization, control functionality, and the I/O points that can achieve multi-gigabit per second data rates. Along with powerful software such as LabVIEW Communications System Design Suite, the multi-core processing and high-bandwidth of the PXIe-8880 controller and PXIe-1085 24 GB/s chassis provide an ideal starting point for any prototyping platform.
The past two decades have seen more technological innovation than we could have ever predicted. It took roughly 18 years to go from 1G to 2G cellular communication but LTE replaced 3G in just under six years. We have seen analog-to-digital converters go from hundreds of MS/s to tens of GS/s. And the predictions around the impact of the Internet of Things, which encourage us to enable every “thing” to sense, compute and communicate, will all be exceeded if the adoption rates continue at their current trajectory.
But, innovation has implications. Going from “it works” in a design environment to “it works” when the user opens the box requires multiple test and measurement steps, and the need for increased bandwidth and processing power is increasing each year. Though sacrificing product quality is not a desirable option, neither is spending valuable time and money to bolt on additional hardware and software each time a new product releases. Predicting the future of product innovation is not possible, but choosing an architecture that accounts for flexibility and scalability is. With the modularity to meet evolving requirements, the combination of the PXIe-8880 embedded controller, the PXIe-1085 24 GB/s chassis, and the industry's largest portfolio of modular instrumentation makes NI PXI a zero-compromise solution for any test and measurement application.