The Device Testing with Digital Pattern Instruments course enables Test and Validation Engineers to perform characterization and production test of semiconductor devices with digital pattern instruments. The course will focus on how digital pattern instruments and the Digital Pattern Editor can be leveraged to perform common device tests, with a focus on DUT communication, digital interface testing, and continuity and leakage testing. The course will guide the learner through the complete test workflow, from calibration and debugging to extending tests into a test executive.
On-Demand, 4 hours
Test Engineers performing semiconductor device characterization and production test
NI PXIe Digital Pattern Instruments
NI Digital Pattern Editor
Create and edit all elements required to burst a digital pattern to your DUT, including pin maps, level sheets, timing sheets, and pattern files
Test DUT modes of operation with SPI commands
Validate DUT communication via register readback testing
Validate DUT timing by interfacing with external test equipment
Validate DUT pin connections via continuity and leakage testing
Utilize opcodes to establish flow control within patterns
Use source and capture waveforms to simplify pattern structure and store data
Synchronize your digital pattern instrument with other instruments in your systems
Use History RAM reports, Shmoo plots, and digital scope to perform debugging activities
Calibrate your instruments and correct for any cable skew
|Creating and Bursting Your First Pattern||Configuring a pin map, level sheet, timing sheet, and pattern file, bursting a digital pattern to the device under test (DUT).|
|Creating Pin Maps||Creating pin maps in Digital Pattern Editor to define DUT connection sites.|
|Creating Specifications Sheets||Storing values from the data sheet of DUT in specifications sheet variables.|
|Creating Pin Levels Sheets||Creating pin levels sheets to define the supply voltages, termination, and logic levels for the DUT.|
|Creating Timing Sheets||Creating timing sheets to define the timing characteristics of the interface with the DUT.|
|Creating Pattern Files||Creating pattern files to communicate with and test the DUT.|
|Programming Digital Pattern in LabVIEW||Programmatically controlling Digital Pattern Instruments using NI-Digital Pattern API.|
|Testing DUT Modes of Operation||Configuring the DUT with Serial Peripheral Interface (SPI) commands to test its modes of operations.|
|Performing Register Readback Tests||Performing a register readback test to validate the communication capabilities of the DUT.|
|Validating DUT Timing||Interfacing with external test equipment to validate the DUT timing.|
|Performing Continuity and Leakage Testing||Performing continuity and leakage tests to validate DUT pin connections.|
Increasing Pattern Robustness with Flow Control
Increasing the robustness of a pattern by using opcodes to establish flow control.
Using Source Waveforms
Using serial and parallel source waveforms to simplify a pattern structure with variable data.
Using Capture Waveforms
Using capture waveforms to store received data for validation and post-processing.
Reviewing Test Results with History RAM Report
Using the result of the History RAM report to debug pattern or device under test (DUT).
Viewing Signals with Digital Scope
Using digital scope to view the actual voltage levels on the pins of Digital Pattern Instrument (PXIe-657x).
Using Shmoo Plots to Visualize Parameter Relationships
Using Shmoo plots to iterate over pattern parameters and view results.
Synchronizing with Other Instruments
Implementing synchronization strategies such as sharing triggers or using NI-TClk to coordinate tasks with other instruments.
Wiring and Calibration
Compensating for cable skew and voltage offsets and exploring device calibration requirements.
Using Opcodes for Scan Testing
Using the scan opcode to divide a vector into one or more scan cycles.