Archived: Register Level Equivalent for VXI Message Based Communication (Word Serial Protocol)

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Overview



The word serial protocol makes it possible to communicate with message based VXI instruments through string writes and reads, much like communication with GPIB instruments. This data exchange takes place through configuration registers in A16 space. Message-based devices have special configuration registers not found on other types of devices. The configuration registers for message-based devices are shown below.

Word serial communication takes place using two special configuration registers: Data Low and the Response register. This document is designed to present the sequence of steps performed by the Word Serial Protocol in a fashion that allows you to to use an interactive tool (such as VIC or VISAIC) to verify the operation of your instrument(s).


Contents

Response Register

The word serial communication protocol is designed to go as fast as the instrument is capable. The Response Register (offset 0xA) is used to perform basic "handshaking" in the same way multiple wires are used to do handshaking with GPIB instruments. The Response Register returns the status of the device’s communication registers and their associated functions. The Response Register has the following pin out:

bits
15
14
13
12
11
10
9
8
7
6-0
content
0
reserved
DOR
DIR
Err*
Read
Ready
Write
Ready
FHS*
Locked*
Device
Dependent

DOR - Data Out Ready. This bit indicates that the device is ready to output data to its commander.

DIR - Data In Ready. This bit indicates that the device is ready to accept data from its commander.

Err* - This is the error bit. The star (*) indicates negative true logic. If this bit is set to zero, an error has occurred. The Read Protocol Error command is used to report the reason for this error.

Read Ready - This bit indicates whether the data registers contain data. This bit is set to one if when data from internal operations is available in the Data Low register. It is cleared to zero as soon as the data is read from Data Low.

Write Ready - This bit indicates whether the device is ready for data transfers to the Data Low.

FHS* - Fast Handshake enabled bit. This bit indicates that the fast handshake protocol is enabled for the device. This is a special high speed handshake protocol support by various devices. The manufacturer will indicate if this protocol is supported.

Locked* - This bit is used to lock the device from word serial accesses.

Word Serial Write


When a device wishes to transfer data to an instrument (i.e. do a word serial write), the instrument’s Response Register must have Write Ready (bit 9) and DIR (bit 12) set. If these bits are not set, keep watching the Response Register until either a user defined time out occurs or the bits become set.

After the correct bits are set in the Response Register, an ASCII character is then transferred to the Data Low register (offset 0xE) along with a handshake byte. The format of the Data Low register is shown below.

Data Low Register(offset 0xE)

bits
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
content
handshake byte
ASCII character


The handshake byte has the following format:

BC - sent with all chars except the last

BD - sent on last character (EOI).

 

In summary, the word serial write does the following steps:
1. Read the Response register (offset 0xA). If Write Ready (bit 9) and DIR (bit 12) are set, then you may proceed, else keep reading this register until those bits are set. A time out occurs when these bits are not set within a specified period of time. This error is implemented in software.

2. Write 0xBCyy into the Data Low Register (offset 0xE) where yy is the hex ASCII value. When writing the last character, use the format 0xBDyy.

3. Repeat the first two steps until the entire string has been transferred.

Word Serial Read


Frequently, a device will have a word serial response to a word serial command. To read an instrument’s response, you must first check the Response register (offset 0xA) to determine if Write Ready (bit9) and DOR (bit 13) are set. If these bits are not set, then poll the Response Register until either a time out occurs or the bits become set. If the bits do not become set, then either the instrument is not ready to give a response or the query command was sent incorrectly.

Once the Write Ready (bit9) and DOR (bit 13) are set, then a character should be requested from the instrument. To request a byte, write 0xDEFF to Data Low (offset 0xE).

Now wait until the device makes the byte available. The byte can be read from Data Low (offset 0xE), but only after the Read Ready (bit 10) is set in the Response register (offset 0xA). Therefore, you must poll the Response register until you see this bit set. An attempt to read from Data Low before the Read Ready bit is set, may cause an error in the firmware of the instrument.

Once the character is read from Data Low, notice the upper byte of the register. This is the handshake byte. The format of this handshake byte is:

FE - another character is to come

FF - this is the last character (EOI)

Use an ASCII lookup table to decode the hex value of the ASCII character in the lower byte.

 

Below is a summary of the word serial read protocol.


1. Read the Response Register (offset 0xA) until Write Ready (bit 9) and DOR (bit 13) are set. If these are not set, keep reading this register until they get set or a time out occurs.

2. Write 0xDEFF to Data Low (offset 0xE) to request a byte to be transferred from the instrument.

3. Read the Response Register (offset 0xA) until Read Ready (bit 10) is set. Keep reading until either this bit gets set or a time out occurs.

4. Read from the Data Low Register (offset 0xE). The format of this register will be 0xFEyy, where yy is the ACSII hex character. If this is the last character being transferred, the data will be of the format 0xFFyy.

5. Repeat step one to four until all characters are read.

 

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