Creating a HIL Simulation and In-Vehicle Test System Using CompactRIO, FPGA, and LabVIEW

Ashok Kumar V, Tata Motors

"Using NI CompactRIO eased the development process and reduced development time immensely and the result is a system that can effectively carry out simulation, data logging and implement complex control algorithms."

- Ashok Kumar V, Tata Motors

The Challenge:

Developing a generic test setup for hardware-in-the-loop (HIL) and in-vehicle testing for automotive aggregate units such as exhaust gas recirculation systems (EGR) and glow plug controllers.

The Solution:

Using NI CompactRIO hardware, field-programmable gate arrays (FPGAs), and NI LabVIEW software to create an HIL system to simulate synchronized engine signals and perform in-vehicle data logging and testing.


Ashok Kumar V - Tata Motors
V M. Vaidya - Tata Motors



The rapidly growing automotive industry needs reliable test systems. Traditional testing facilities only perform HIL testing because in-vehicle testing is expensive and infeasible. We were challenged with developing a reliable, cost-effective test system that performs HIL testing during development as well as in-vehicle data logging and testing after production.

Figure 1 illustrates the basic block diagram for our HIL test. All the blocks communicate through Ethernet, and the TPC and laptop communicate through a patch cable.


System Description

We created a system that generates signals such as throttle, engine RPM, coolant temperature, and solenoid/actuator status to feed to the controllers for HIL testing. It also logs the actual signals during in-vehicle test. The HIL portion of the system includes two CompactRIO systems for debugging during the development process. For field data logging, the system uses TPC to easily store data in USB. The system uses two communication modes between CompactRIO and TPC – RS232 and Ethernet. To implement complex control algorithms, we use Ethernet-based communication because the communication setup and programming in shared variables is more convenient than serial communication through RS232.


There are three portions of the test system: the Windows host, the CompactRIO real-time host, and the FPGA target onboard the CompactRIO. The deterministic CompactRIO real-time environment combined with the FPGA can quickly and easily handle parallel I/O. In this application, the onboard FPGA acquires data at the default 40 MHz FPGA clock rate. Data analysis takes place in the real-time host.

Figure 2 shows the real-time host VI front panel and block diagram. As illustrated, a reference to the FPGA handles the FPGA properties such as timing and physical data acquired.


In the second loop, we specify the FPGA loop rate for the measurement. The data transferred from the FPGA to the host is a binary representation of an I32 value because the FPGA can only handle integers. This integer is converted to the actual floating point analog value that the sensor measures. The conversion takes place within the binary to nominal VI inside the For Loop. The resultant output is a floating point numeric value, which we can either display or use for further analysis.

The LabVIEW graphical dataflow programming environment makes the development process easier and faster. The LabVIEW programming platform inherently appeals to engineers and scientists who can adopt it readily without having to spend time and effort on learning syntax. With the add-on toolkits and modules, such as the LabVIEW FPGA Module and LabVIEW Real-Time Module, we can use LabVIEW for domain-specific industrial applications.



We created a real-time, stand-alone system that deterministically performs operations, reduces human involvement, and provides accurate, realistic results. For hardware-level simulation and control, FPGA is an ideal platform. It is the best possible option for prototyping and immensely reduces development time and cost. It can handle parallel operations at the same rates as single-loop operations because everything happens at the hardware level. Using CompactRIO eased the development process and reduced development time immensely. The result is a system that can effectively carry out simulation and data logging in addition to implementing complex control algorithms.


Author Information:

Ashok Kumar V
Tata Motors
Tata Motors

Figure 1: The Hardware-In-Loop Test Setup
Figure 2: Front panel showing the reading map with respect to throttle and RPM