The VeriStand Engine is the execution mechanism that controls the timing of the entire system and the communication between the target and the host computer.
The VeriStand Engine executes hardware I/O, runs models, procedures, alarms, and tests, and computes values in the channel table based on the results of model execution and hardware I/O. This engine runs on either a desktop PC in simulation mode or as an embedded application on a RT system.
The VeriStand Engine consists of multiple timed loops that use real-time (RT) FIFOs to transfer data between the loops. Each loop performs designated tasks and has an assigned priority. Although you cannot change the priority or primary tasks of the engine loops, you can customize loop operations, such as the execution rate. The system definition file contains the configuration settings for the VeriStand Engine.
The following figure illustrates the operation of the VeriStand Engine.
The following table displays the priority and default execution rate for the loops of the VeriStand Engine.
VeriStand Engine loop | Description | Priority | Default execution rate |
---|---|---|---|
Primary Control Loop (PCL) |
Controls the timing for the VeriStand Engine and maintains the most up-to-date table of channel values. Use System Explorer to set the execution mode of the PCL. Per iteration, the PCL executes the following tasks:
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Note
For more information on the PCL, see Primary Control Loop Execution Steps |
High | 100 Hz |
Model Execution Loop(s) |
Executes a corresponding compiled model. The number of models in the system definition determines the number of loops. |
Medium | A decimation of the PCL rate |
Asynchronous Custom Device Loop(s) |
Executes and transmits custom device inport data values per iteration of the PCL. The VeriStand Engine is responsible for initiating the Asynchronous Custom Device Loop. |
|
User-defined |
Waveform Processing Loop |
Transfers waveform data through the system. |
Low | Event driven |
DAQmx Waveform Producer Loops |
Acquires waveforms from DAQ devices. Each DAQmx Waveform Producer Loop corresponds to a waveform task in the system definition. |
Low | 10 Hz or user-defined |
Data Processing Loop |
Distributes the execution commands received by the Communication Receive Loop among the engine loops. Like the PCL, the Data Processing Loop maintains a complete copy of the channel values table. |
Medium | A decimation of the PCL rate |
Communication Send Loop | Transmits channel values to the VeriStand Gateway. | Low | 15 Hz |
Communication Receive Loop | Listens for execution commands that the VeriStand Gateway sends. | Low | Event driven |
XNET Loop | Reads and writes XNET data. | Low | 100 Hz |
DIO Loop | Reads and writes low-speed digital DAQ I/O data. | Low | A decimation of the PCL rate |
Model Interface Loop | Reads and writes the lower-speed, asynchronous updates to model parameter values. | Low | Event driven |