Table Of Contents

VeriStand Engine

Last Modified: June 10, 2021

The VeriStand Engine is the execution mechanism that controls the timing of the entire system and the communication between the target and the host computer.

The VeriStand Engine executes hardware I/O, runs models, procedures, alarms, and tests, and computes values in the channel table based on the results of model execution and hardware I/O. This engine runs on either a desktop PC in simulation mode or as an embedded application on a RT system.

The VeriStand Engine consists of multiple timed loops that use real-time (RT) FIFOs to transfer data between the loops. Each loop performs designated tasks and has an assigned priority. Although you cannot change the priority or primary tasks of the engine loops, you can customize loop operations, such as the execution rate. The system definition file contains the configuration settings for the VeriStand Engine.


The VeriStand Engine determines which system definition file to run by communicating over the network with the VeriStand Gateway.

The following figure illustrates the operation of the VeriStand Engine.

The following table displays the priority and default execution rate for the loops of the VeriStand Engine.

VeriStand Engine loop Description Priority Default execution rate
Primary Control Loop (PCL)

Controls the timing for the VeriStand Engine and maintains the most up-to-date table of channel values. Use System Explorer to set the execution mode of the PCL.

Per iteration, the PCL executes the following tasks:
  • Reads and writes high-speed FPGA I/O, analog and counter DAQ I/O, and Asynchronous Custom Device Loop data.
  • Applies scaling to the data.
  • Executes one step of the real-time sequence of a test that is currently running
  • Sends data to the Data Processing Loop to synchronize the table of channel values.
  • Sends data to the Model Execution Loop(s).
  • Prompts the Data Processing Loop, Model Execution Loop(s), and Asynchronous Custom Device Loop(s) to execute.
  • Performs software fault insertion.
  • Creates mapping connections.
  • Executes inline custom devices.
  • Reads status information from the Waveform Processing Loop and DAQmx Waveform Producer Loop(s).

For more information on the PCL, see Primary Control Loop Execution Steps

High 100 Hz
Model Execution Loop(s)

Executes a corresponding compiled model. The number of models in the system definition determines the number of loops.

Per iteration, each Model Execution Loop executes the following tasks:
  • Reads the data sent by the PCL and maps this data to model inports.
  • Executes one step of the model.
  • Reads model outport values and sends this data to the PCL.
  • Reads model inport signals and sends this data to the PCL.

A Model Execution Loop handles high-speed, dynamic data associated with model inports and outports, while a Model Interface Loop reads and applies the lower-speed, asynchronous updates to model parameter values.

Medium A decimation of the PCL rate
Asynchronous Custom Device Loop(s)

Executes and transmits custom device inport data values per iteration of the PCL. The VeriStand Engine is responsible for initiating the Asynchronous Custom Device Loop.

  • High
  • Medium
  • Low
Waveform Processing Loop

Transfers waveform data through the system.

Per iteration, the Waveform Processing Loop executes the following tasks:
  • Reads waveform data from DAQmx Waveform Producer Loops.
  • Sends waveform data to the VeriStand Gateway.
  • Reads waveform data from custom devices.
  • Sends waveform data to custom devices.
Low Event driven
DAQmx Waveform Producer Loops

Acquires waveforms from DAQ devices. Each DAQmx Waveform Producer Loop corresponds to a waveform task in the system definition.

Per iteration, Waveform Producer Loop executes the following tasks:
  • Reads waveform data from analog input channels on DAQ devices.
  • Sends waveform data to the Waveform Processing Loop.
  • Logs acquired data to .tdms files.
Low 10 Hz or user-defined
Data Processing Loop

Distributes the execution commands received by the Communication Receive Loop among the engine loops. Like the PCL, the Data Processing Loop maintains a complete copy of the channel values table.

Per iteration, the Data Processing Loop executes the following tasks:
  • Receives the table of channel values from the PCL.
  • Executes procedures, alarms, and calculated channels.
  • Transmits updated table of channel values to the PCL.
  • Sends data values to the Communication Send Loop.
Medium A decimation of the PCL rate
Communication Send Loop Transmits channel values to the VeriStand Gateway. Low 15 Hz
Communication Receive Loop Listens for execution commands that the VeriStand Gateway sends. Low Event driven
XNET Loop Reads and writes XNET data. Low 100 Hz
DIO Loop Reads and writes low-speed digital DAQ I/O data. Low A decimation of the PCL rate
Model Interface Loop Reads and writes the lower-speed, asynchronous updates to model parameter values. Low Event driven

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