Table Of Contents

Theory of Operation

Last Modified: January 13, 2021

During test execution, the PXIe-4135 generates a voltage of up to 125 V to charge the pulse buffer circuit on the NI-4134. Once the pulse buffer circuit is fully charged, the NI-4134 is ready to produce high speed electrical pulses. The high speed primary and secondary NI-4134 outputs can each drive a pulse train of up to 2.1 A as long as the VCSEL forward voltage remains below 3.1 V.

The settings for each pulse in a pulse train are identical. A pause between each pulse train is required to prevent the VCSEL I-V Test Subsystem and the DUT from overheating. Refer to the Specifications section for more information about pulse trains, including burst time, break time, pulse setting restrictions, current programming, and voltage measurement range.

The following figure displays an example of a pulse train within a single pulse burst, which lasts less than one millisecond.

Figure 1. Pulse Train Diagram
The PXIe-5162 measures the DUT voltage at the moment the pulse reaches the DUT. This voltage measurement passes through a 30 dB attenuator on the PXIe-5162 front panel, which protects the PXIe-5162 from damage. The VCSEL I-V Test Subsystem then applies an algorithm to derive the DUT current using the DUT voltage and parameters gathered during the subsystem measurement compensation procedures.

When the PXIe-5162 measures the DUT voltage, the PXIe-5162 meanwhile generates a digital trigger that other devices can detect. The VCSEL I-V Test Subsystem supports exporting a digital trigger to only PFI 0 or PFI 1 on the front panel of the PXIe-5162.

Two measurement compensation procedures are required to set the pulse current amplitude in order to accurately measure the I-V relationship of the DUT. These compensation procedures characterize pulse trains with an open circuit, a shorted circuit, and a known-good DUT circuit. Refer to the Measurement Compensation section for more information about the VCSEL I-V Test Subsystem measurement compensation.

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