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Configuring a PXIe-657x Interface

Last Modified: November 6, 2020

After you create an interface for a PXIe-6570 or PXIe-6571 in the Digital Pattern Editor, you must configure the interface settings in the Semiconductor Device Control Add-On before you can add protocols to the interface.

Before you begin this procedure, launch the Semiconductor Device Control Add-On and open your project in a large panel.

Complete the following steps to configure an interface for a PXIe-6570 or PXIe-6571 digital pattern instrument.

  1. Open the Hardware Configuration tab of the large panel.
  2. Select the configuration settings for the interface using the Choose Configuration drop-down menu.
  3. In the configuration section of the Hardware Configuration tab, enter the name of the interface, select the interface type from the Type drop-down menu, and click Add Interface.
  4. Select the new interface and configure the hardware settings for the interface.
    1. Select the digital pattern project to use with this interface from the Template Pattern Project drop-down menu. If you are using a copy of a template digital pattern project, select Custom.
    2. If you select Custom from the Template Pattern Project drop-down menu, enter the file path for the custom digital pattern project file.
    3. If the selected project contains multiple pin map files, select the pin map for the interface from the Pin Map Name drop-down menu.
    4. If needed, update the NI Digital Resource field to match the name of the name of the instrument in the system.
    5. If you want to force the instrument to reset while initializing communication with the hardware, toggle Reset Instrument on.
  5. In the configuration mapping section of the Hardware Configuration tab, verify the DIO pin channel assignments match the channel assignments defined in the digital pattern project pin map file. Channel assignment updates in the Semiconductor Device Control Add-On do not apply to the digital pattern project pin map file. If needed, update both files to ensure consistent DIO pin channel assignment.

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