These specifications apply to the 128 MB, 512 MB, and 2 GB PXIe-5451.
Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.
Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.
Specifications are valid under the following conditions unless otherwise noted.
Warranted specifications are valid under the following conditions unless otherwise noted.
Typical specifications are valid under the following conditions unless otherwise noted:
Number of channels |
2 |
Output type |
Single Ended[1], Differential |
Output paths |
Main path, Direct path |
DAC resolution |
16 |
Amplitude resolution |
4 digits, <0.0025% (0.0002 dB of amplitude range) |
Offset resolution[2] |
4 digits, < 0.002% of offset range |
Flatness Correction State | Load | Amplitude[4] | |||||
---|---|---|---|---|---|---|---|
Single-Ended Main Path[5] | Differential Main Path[6] | Differential Direct Path[7] | |||||
Min. (VPPSE) | Max. (VPPSE) | Min. (VPPD) | Max. (VPPD) | Min. (VPPD) | Max. (VPPD) | ||
Disabled | 50 Ω | 0.00176 | 2.50 | 0.00352 | 5.00 | 0.708 | 1.00 |
1 kΩ | 0.00336 | 4.76 | 0.00671 | 9.52 | 1.35 | 1.9 | |
Open | 0.00352 | 5.00 | 0.00705 | 10.00 | 1.42 | 2.00 | |
Enabled | 50 Ω | 0.00124 | 1.75 | 0.00247 | 3.50 | 0.567 | 0.8 |
1 kΩ | 0.00235 | 3.33 | 0.00470 | 6.66 | 1.08 | 1.52 | |
Open | 0.00247 | 3.50 | 0.00493 | 7.00 | 1.14 | 1.6 |
|
Temperature Range | Single-Ended Main Path | Differential Main Path | Differential Direct Path |
---|---|---|---|
Within ±5 °C of Self-Cal temperature | ±(0.4% of single-ended output range[14] + 0.5 mV) ±(0.3% of single-ended output range[14] + 0.3 mV), typical |
±(0.6% of differential output range[15] + 1 mV) ±(0.43% × differential output range[15] + 500 μV), typical |
±0.2% of differential output range |
Outside ± 5 °C of Self-Cal temperature | -0.05%/°C -0.035%/°C, typical |
-0.05%/°C -0.035%/°C, typical |
+0.030%/°C +0.015%/°C, typical |
Absolute single-ended Main path offset error (0 °C to 55 °C) |
±(0.15% of offset + 0.04% of single-ended output range[14] + 1.25 mV) ±(0.08% of offset + 0.025% of single-ended output range[14] + 0.75 mV), typical |
||||||
|
|||||||
|
Temperature Range | Differential Main Path | Differential Direct Path |
---|---|---|
Within ±5 °C of Self-Cal temperature | ±(0.66% of differential output range[15] + 1.75 mV) | ±0.08% of differential output range[15] |
Outside ±5 °C of Self-Cal temperature | -0.02%/°C -0.01%/°C, typical |
+0.010%/°C +0.005%/°C, typical |
|
|||||||||
Channel-to-channel, relative AC amplitude accuracy |
±0.2% of differential output range ±0.07% of differential output range, typical |
|
|||||||||||||||||||||||||||||||
|
|||||||||||||||||||||||||||||||
Load impedance compensation |
Output amplitude is compensated for user-specified load impedance to ground. Performed in software.[19] |
||||||||||||||||||||||||||||||
Output coupling |
DC |
||||||||||||||||||||||||||||||
Output enable |
Software-selectable. When disabled, output is terminated with a 50 Ω, 1 W resistor. |
||||||||||||||||||||||||||||||
|
|||||||||||||||||||||||||||||||
Waveform summing |
The output terminals support waveform summing, which means the outputs of multiple PXIe-5451 signal generators can be connected together.[21] |
Path | Baseband | Complex Baseband |
---|---|---|
Main Path, Filter Disabled | 180 MHz for each I and Q output | 360 MHz when used with external I/Q modulator |
Main Path, Filter Enabled | 135 MHz for each I and Q output | 270 MHz when used with external I/Q modulator |
Direct Path | 145 MHz for each I and Q output | 290 MHz when used with external I/Q modulator |
|
Frequency Range | Channel-to-Channel Passband Flatness Matching Enabled | Single-Ended and Differential Main Path, Filter Enabled | Direct Path[25] | ||
---|---|---|---|---|---|
Flatness Correction Disabled | Flatness Correction Enabled [26] | Flatness Correction Disabled | Flatness Correction Enabled[26] | ||
0 MHz to 60 MHz[27] | No | 0.8 dB, typical | ±0.30 dB ±0.20 dB, typical |
0.5 dB, typical | ±0.24 dB ±0.13 dB, typical |
Yes | ±0.12 dB, typical | ±0.12 dB typical | 0.05 dB, typical | 0.03 dB, typical | |
60 MHz[27] to 135 MHz[28] | No | 3 dB, typical | ±0.50 dB ±0.30 dB, typical |
1.9 dB, typical | ±0.34 dB ±0.19 dB, typical |
Yes | ±0.20 dB, typical | ±0.14 dB typical | 0.18 dB, typical | 0.04 dB, typical |
Frequency Range | Single-Ended Main Path | Differential Main Path | Differential Direct Path | |||||
---|---|---|---|---|---|---|---|---|
Gain = 0.25 0.5 VPPSE |
Gain = 0.625 1.25 VPPSE |
Gain = 1.25 2.5 VPPSE |
Gain = 0.5 1 VPPD |
Gain = 1.25 2.5 VPPD |
Gain = 2.5 5 VPPD |
Gain = 0.5 1 VPPD |
||
SFDR With Harmonics (dB) | DC to 7 MHz | 82 | 85 | 88 | ||||
DC to 200 MHz | 75 | 75 | 75 | |||||
SFDR Without Harmonics (dB) | DC to 7 MHz | 82 | 88 | 95 | 98 | 98 | ||
DC to 200 MHz | 82 | 83 | 84 | 84 | 84 |
Frequency | Single-Ended Main Path | Differential Main Path | Differential Direct Path | |||||
---|---|---|---|---|---|---|---|---|
Gain = 0.25 0.5 VPPSE |
Gain = 0.625 1.25 VPPSE |
Gain = 1.25 2.5 VPPSE |
Gain = 0.5 1 VPPD |
Gain = 1.25 2.5 VPPD |
Gain = 2.5 5 VPPD |
Gain = 0.5 1 VPPD |
||
SFDR With Harmonics (dB)[31] | 10 MHz | 73 (75) | 73 (75) | 73 (75) | 73 (75) | 73 (75) | 73 (73) | 73 (75) |
60 MHz | 65 | 61 | 56 | 69 | 67 | 64 | 70 (72) | |
100 MHz | 53 | 52 | 49 | 55 | 54 | 53 | 60 | |
120 MHz | 62 | 62 | 62 | 62 | 62 | 62 | 62 | |
160 MHz | — | 62 | ||||||
SFDR Without Harmonics (dB) | 10 MHz | 74 (76) | 74 (76) | |||||
60 MHz | 72 (74) | 72 (74) | ||||||
100 MHz | 66 | 64 | ||||||
120 MHz | 62 | 62 | ||||||
160 MHz | — | 62 |
In-Band Tone Frequency (MHz) | Out-of-Band Spur Level (dBm) | |
---|---|---|
Main Path, Filter Enabled | Direct Path | |
0 MHz to 20 MHz | <–65 dBm | <–80 dBm |
20 MHz to 50 MHz | <–45 dBm | <–65 dBm |
Aggressor Output Amplitude | Main Path[34] (0 MHz to 200 MHz) | Direct Path | |
---|---|---|---|
0 MHz to 150 MHz | 0 MHz to 200 MHz | ||
2.5 | –90 dBc | <90 dBc | <80 dBc |
1.25 | –85 dBc | ||
0.5 | –80 dBc | ||
0.15 | –70 dBc |
Output Amplitude | Frequency (MHz) | THD (dBc) | ||
---|---|---|---|---|
Main Path | Direct Path | |||
Single-Ended | Differential | |||
2.5 VPPSE, 5 VPPD | 10 | –71 | –71 | — |
20 | –66 | –69 | ||
40 | –59 | –64 | ||
60 | –55 | –61 | ||
80 | –51 | –55 | ||
120 | –50 | –51 | ||
140 | –50 | –52 | ||
160 | –50 | –53 | ||
1.25 VPPSE, 2.5 VPPD | 10 | –78 | –75 | |
20 | –72 | –73 | ||
40 | –63 | –69 | ||
60 | –60 | –65 | ||
80 | –56 | –59 | ||
120 | –56 | –59 | ||
140 | –56 | –59 | ||
160 | –55 | –59 | ||
0.5 VPPSE, 1 VPPD | 10 | –80 | –79 | –75 |
20 | –74 | –75 | –70 | |
40 | –68 | –69 | –68 | |
60 | –64 | –69 | — | |
80 | –62 | –65 | –68 | |
100 | — | — | –68 | |
120 | –65 | –70 | –78 | |
140 | –64 | –69 | — | |
160 | –61 | –66 | –83 |
Output Amplitude | Frequency (MHz) | IMD (dBc) | ||
---|---|---|---|---|
Single-Ended and Differential Main Path | Direct Path[37] | |||
2.5 VPPSE, 5 VPPD | 10 | –87 | — | |
20 | –82 | |||
40 | –71 | |||
60 | –63 | |||
80 | –57 | |||
120 | –51 | |||
160 | –48 | |||
1.25 VPPSE, 2.5 VPPD | 10 | –92 | ||
20 | –87 | |||
40 | –79 | |||
60 | –72 | |||
80 | –66 | |||
120 | –61 | |||
160 | –57 | |||
0.5 VPPSE, 1 VPPD | 10 | –87 | –84 | |
20 | –85 | –81 | ||
40 | –82 | –75 | ||
60 | –79 | — | ||
80 | –75 | –71 | ||
100 | — | –68 | ||
120 | –79 | –68 | ||
160 | –75 | –66 | ||
0.1 VPPSE, 0.2 VPPD | 10 | –89 | — | |
20 | –83 | |||
40 | –78 | |||
60 | –73 | |||
80 | –69 | |||
120 | –66 | |||
160 | –65 |
Sample Clock Source | Output Freq. (MHz) | System Phase Noise Density (dBc/Hz) | System Output Integrated Jitter[40] (fs) | ||||
---|---|---|---|---|---|---|---|
100 Hz | 1 kHz | 10 kHz | 100 kHz | 1 MHz | |||
Internal, High Resolution Clock, 400 MS/s | 10 | <–121 | <–137 | <–146 | <–152 | <–153 | <350 |
100 | <–101 | <–119 | <–126 | <–136 | <–141 | <350 | |
CLK IN External 10 MHz Reference Clock, 400 MS/s | 10 | <–122 | <–135 | <–146 | <–152 | <–153 | <350 |
100 | <–105 | <–115 | <–126 | <–136 | <–141 | <350 |
Function | Main Path | Direct Path [41] | ||||
---|---|---|---|---|---|---|
Sine | 135 MHz | 145 MHz | ||||
Square | 150 MHz[42] | 33 MHz (<133 V/μs slew rate) [43] | ||||
Ramp | 20 MHz[42] | 1 MHz (< 50 V/μs slew rate) [43] | ||||
Triangle | 20 MHz[42] (5 MHz) | 8 MHz |
Flatness Correction | Main Path | Direct Path | |
---|---|---|---|
Filter Disabled | Filter Enabled | ||
Flatness Correction Disabled | 1.5 ns | 3 ns | 3 ns |
Flatness Correction Enabled | — | 3 ns | 2.5 ns |
Flatness Correction | Main Path | Direct Path | |
---|---|---|---|
Filter Disabled | Filter Enabled | ||
Flatness Correction Disabled | 3% | 18% | 18% (7%)[48] |
Flatness Correction Enabled | — | 25% | 22% |
External Sample clock source |
CLK IN front panel connector, with multiplication and division |
External Sample clock rate |
10 MS/s, 20 MS/s to 400 MS/s |
Sample Clock rate range |
12.2 kS/s to 400 MS/s |
Multiplication/Division factor range |
Varies depending on the external Sample clock rate |
External Sample clock delay |
0 ns to 2 ns, independent per channel[51] |
External Sample clock delay resolution |
10 ps, nominal |
External Sample clock timebase phase adjust |
±1 Sample clock timebase period |
External Sample clock timebase sources |
CLK IN front panel connector, with division |
External Sample clock timebase rate range |
200 MS/s to 400 MS/s |
Divide factor range |
1, 2 to 32768 in steps of 2 |
Sample Clock delay |
0 ns to 2 ns, independent per channel |
Sample Clock delay resolution |
10 ps nominal |
Reference clock sources |
None (internal reference), PXI_CLK10 (backplane), or CLK IN (front panel connector) |
||||||||
|
|||||||||
Internal reference clock frequency accuracy |
± 0.01%[53] |
Direction |
Input |
||||||
Destinations |
Reference clock, Sample clock, or Sample clock timebase |
||||||
Frequency range |
1 MHz to 400 MHz[56] |
||||||
Input impedance |
50 Ω , nominal |
||||||
|
|||||||
|
|||||||
Duty cycle requirements |
45% to 55% |
||||||
Input coupling |
AC |
||||||
Voltage standing wave ratio (VSWR) |
1.3:1 up to 2 GHz, nominal |
Direction |
Output |
Sources |
Sample clock, divided by integer K (1≤ K ≤ 3, minimum[57]), Reference clock, or Sample clock timebase, divided by integer M (1 ≤ M ≤ 1048576) |
Frequency Range |
100 kHz to 400 MHz |
Output Voltage |
≥0.7 Vpk-pk into 50 Ω typical |
Maximum Output Overload |
3.3 Vpk-pk from a 50 Ω source |
Output Coupling |
AC |
VSWR |
1.3:1 up to 2 GHz nominal |
Direction |
Bidirectional |
||||||||||||||||||
Frequency Range |
DC to 200 MHz |
||||||||||||||||||
|
|||||||||||||||||||
|
|||||||||||||||||||
Maximum Output Overload |
–2 V to +6.5 V |
||||||||||||||||||
|
|||||||||||||||||||
Rise/Fall Time |
3 ns typical.[60] |
Sources |
PFI<0..1> (SMB front panel connectors), PXI_Trig<0..7> (backplane connector), or Immediate (does not wait for a trigger). Immediate is the default value. |
||||||||
Types |
Start trigger edge, Script trigger edge and level, and software trigger |
||||||||
Edge detection |
Rising, falling |
||||||||
Minimum Pulse Width |
25 ns |
||||||||
Delay from Trigger to Analog Output with OSP Disabled |
154 Sample clock timebase periods + 65 ns, nominal |
||||||||
Additional Delay with OSP Enabled |
Varies with OSP configuration. |
||||||||
|
Destinations |
PFI<0..1> (SMB front panel connectors) or PXI_Trig<0..6> (backplane connector) |
||||||
Types |
Marker<0..3>, Data Marker<0..1>[61], Ready for Start, Started, Done |
||||||
Quantum |
Marker position must be placed at an integer multiple of two samples. There are two data markers per channel. |
||||||
Width |
Adjustable, minimum of 2 samples. Default is 150 ns. |
||||||
|
Memory Usage |
The PXIe-5451 uses the Synchronization and Memory Core (SMC) technology in which waveforms and instructions share onboard memory. Parameters, such as number of segments in sequence list, maximum number of waveforms in memory, and number of samples available for waveform storage, are flexible and user defined. |
||||||||
|
|||||||||
Loop Count |
1 to 16,777,215; Burst trigger: Unlimited |
||||||||
Quantum |
Waveform size must be an integer multiple of two samples. |
||||||||
Output modes |
Arbitrary Waveform, Script, and Arbitrary Sequence |
Trigger Mode | Number of Channels | Arbitrary Waveform Mode | Arbitrary Sequence Mode >180 MS/s | Arbitrary Sequence Mode ≤180MS/s | |||
---|---|---|---|---|---|---|---|
Single | 1 | 4 | 2 | 2 | |||
2 | 4 | 4 | 4 | ||||
Continuous | 1 | 142 | 140 | 58 | |||
2 | 284 | 280 | 116 | ||||
Stepped | 1 | 210 | 154 | 54 | |||
2 | 420 | 308 | 108 | ||||
Burst | 1 | 142 | 1,134 | 476 | |||
2 | 284 | 2,312 | 952 |
Generation Mode | Number of Channels | 128 MB | 512 MB | 2 GB | |||
---|---|---|---|---|---|---|---|
Arbitrary Waveform Mode, Maximum Waveform Memory[65] | 1 | 67,108,352 | 268,434,944 | 1,073,741,312 | |||
2 | 33,553,920 | 134,217,216 | 536,870,400 | ||||
Arbitrary Sequence Mode, Maximum Waveform Memory[66] | 1 | 67,108,352 | 268,434,944 | 1,073,741,312 | |||
2 | 33,553,920 | 134,217,216 | 536,870,400 | ||||
Arbitrary Sequence Mode, Maximum Waveforms[67] | 1 | 1,048,575 | 4,194,303 | 16,777,217 | |||
2 | 524,287 | 2,097,151 | 8,388,607 | ||||
Arbitrary Sequence Mode, Maximum Segments in a Sequence[68] | 1 | 8,388,597 | 33,554,421 | 134,217,717 | |||
2 | 4,194,293 | 16,777,205 | 67,108,853 |
Sample Rate | Number of Channels | 128 MB | 512 MB | 2 GB | |||
---|---|---|---|---|---|---|---|
400 MS/s | 1 | 0.17 seconds | 0.67 seconds | 2.68 seconds | |||
2 | 0.084 seconds | 0.34 seconds | 1.34 seconds | ||||
25 MS/s | 1 | 2.68 seconds | 10.74 seconds | 42.95 seconds | |||
2 | 1.34 seconds | 5.37 seconds | 21.47 seconds | ||||
100 kS/s | 1 | 11 minutes 11 seconds | 44 minutes 44 seconds | 2 hours 58 minutes 57 seconds | |||
2 | 5 minutes 35 seconds | 22 minutes 22 seconds | 1 hour 29 minutes 29 seconds |
OSP Interpolation Range |
2, 4, 8, 12, 16, 20 24 to 8,192 (multiples of 8) 8,192 to 16,384 (multiples of 16) 16,384 to 32,768 (multiples of 32) |
I/Q Rate[70] |
Sample clock rate ÷ OSP interpolation |
Data Processing Modes[71] |
Real (I path only) or Complex (I/Q) |
OSP Modes[72] |
IF or Baseband |
Maximum Bandwidth |
0.8 × I/Q rate. When using an external I/Q modulator, RF Bandwidth = 0.8 × I/Q rate. |
Filter Types | Parameter | Minimum | Maximum |
---|---|---|---|
Flat[76] | Passband | 0.4 | 0.4 |
Raised cosine[77] | Alpha | 0.1 | 0.4 |
Root raised cosine[78] | Alpha | 0.1 | 0.4 |
QAM Order | Symbol Rate (MS/s) | Alpha | Bandwidth | EVM (%) | MER (dB) | ||||
---|---|---|---|---|---|---|---|---|---|
40 MHz IF | 70 MHz IF | 110 MHz IF | 40 MHz IF | 70 MHz IF | 110 MHz IF | ||||
M = 4 | 0.16 | 0.25 | 200 kHz | 0.2 | 0.2 | 0.2 | 57 | 57 | 56 |
0.80 | 0.25 | 1.00 MHz | 0.2 | 0.2 | 0.2 | 57 | 56 | 55 | |
4.09 | 0.22 | 4.98 MHz | 0.2 | 0.3 | 0.2 | 57 | 52 | 55 | |
M = 16 | 17.6[85] | 0.25 | 22.0 MHz | 0.3 | 0.5 | 0.4 | 51 | 45 | 49 |
32.0[86] | 0.25 | 40.0 MHz | 0.6 | — | 0.6 | 42 | — | 43 | |
M = 64 | 5.36 | 0.15 | 6.16 MHz | 0.2 | 0.3 | 0.2 | 54 | 51 | 53 |
6.95 | 0.15 | 7.99 MHz | 0.3 | 0.3 | 0.3 | 52 | 51 | 50 | |
25.0 | 0.15 | 28.75 MHz | 0.4 | 0.6 | 0.4 | 46 | 43 | 46 | |
M = 256 | 6.95 | 0.15 | 7.99 MHz | 0.3 | 0.3 | 0.4 | 52 | 51 | 49 |
External Calibration |
The external calibration calibrates the ADC voltage reference and passband flatness. Appropriate constants are stored in nonvolatile memory. |
Self-Calibration |
An onboard, 24-bit ADC and precision voltage reference are used to calibrate the DC gain and offset. Onboard channel alignment circuitry is used to calibrate the skew between channels. The self-calibration is initiated by the user through the software and takes approximately 60 seconds to complete. Appropriate constants are stored in nonvolatile memory. |
Calibration Interval |
Specifications valid within 1 year of external calibration |
Warm-up Time |
15 minutes |
|
|||||||
|
|||||||
|
Dimensions |
3U, two-slot, PXI Express module 21.6 cm × 4.0 cm × 13.0 cm (8.5 in. × 1.6 in. × 5.1 in.) |
Weight |
550 g (19.4 oz) |
Maximum altitude |
2,000 m (800 mbar) (at 25 °C ambient temperature) |
Pollution Degree |
2 |
Operating shock |
30 g peak, half-sine, 11 ms pulse (Tested in accordance with IEC 60068-2-27. Meets MIL-PRF-28800F Class 2 limits.) |
||||||
|
This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:
For UL and other safety certifications, refer to the product label or the Online Product Certification section.
For EMC declarations and certifications, refer to the Online Product Certification section.
This product meets the essential requirements of applicable European Directives, as follows:
Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for this product, visit ni.com/certification, search by model number or product line, and click the appropriate link in the Certification column.
NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.
For additional environmental information, refer to the Minimize Our Environmental Impact web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.
At the end of the product life cycle, all NI products must be disposed of according to local laws and regulations. For more information about how to recycle NI products in your region, visit ni.com/environment/weee.
The voltage output levels are set in the software and are based on a 50 Ω per line load termination to ground (the default) or based on the user-specified load resistance. Common-mode offset assumes output terminals are terminated into equal loads to ground. Gain values in NI-FGEN correspond to Vpk, which is half the amplitude in Vpk-pk.
Combinations of waveform data, offset, and gain that exceed a single-ended output of 3.2 Vpk may result in waveform clipping.
For all configurations, both CH± terminals are terminated to ground through loads of the same value.
The voltage output levels are set in the software and are based on a 50 Ω per line load termination to ground (the default) or based on the user-specified load resistance. Common-mode offset assumes output terminals are terminated into equal loads to ground.
Gain error within ±5 °C of self-cal temperature: ±(0.4% * 5 V + 0.5 mV) = ±20.5 mV
Gain error at +10 °C of self-cal temperature: ±20.5 mV - 0.05% * 5 °C * (5 V) = +8 mV/-33 mV
Offset error: [2 V Offset at Gain = 2.5 ] ±(0.15% * (2 V) + 0.04% * (5 V) + 1.25 mV) = ±6 .25 mV
Gain error within ±5 °C of self-cal temperature: ±(0.6% * 10 V + 1 mV) = ±61 mV
Gain error at +10 °C of self-cal temperature: ±61 mV - 0.05% * 5 °C * (10 V) = +36 mV/-86 mV
Differential offset error: [Requested Differential Offset = 1 V at Gain = 5] ±(0.3% * (1 V) + 0.01% * (10 V) + 2 mV) = ±6 mV
Frequency ranges with flatness correction enabled are sample rate dependent. The 60 MHz frequency is defined by the 0 MHz to 60 MHz Passband Flatness specification. Value = Min (0.3375 × Sample Rate, 60 MHz)
400 MS/s sample rate, amplitude -1 dBFS. Measured from DC to 200 MHz. All values include aliased harmonics. Differential output measured single-ended with balun.
For cells with two values, the first specification listed is for a 10.0 MHz sinusoid at a 400 MS/s sample rate (waveform contains 40 unique samples), and the specification in parentheses is for a 10.0 MHz sinusoid at a 399.9 MS/s sample rate (waveform contains over 3,000 unique samples with unique DAC codes). Long, non-repetitive waveforms like modulated signals offer better spurious performance. For periodic waveforms represented by a small number of unique samples, DAC nonlinearities limit dynamic specifications.
Generating sine wave at an output frequency of 400 MS/s.