These specifications apply to the 128 MB and 512 MB PXIe-5450.
The outputs of this sensitive test and measurement product are not protected for electromagnetic interference for functional reasons. As a result, this product may experience reduced accuracy or other temporary performance degradation when cables are attached in an environment with electromagnetic interference present.
Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.
Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.
Specifications are valid under the following conditions unless otherwise noted.
Warranted specifications are valid under the following conditions unless otherwise noted.
Typical specifications are valid under the following conditions unless otherwise noted:
Number of channels |
2 |
Output type |
Differential |
Output paths |
Direct path |
DAC resolution |
16 bits |
Amplitude resolution |
4 digits, <0.0025% (0.0002 dB of amplitude range) |
Flatness Correction State | Load | Amplitude (Vpk-pk)[2] | |
---|---|---|---|
Minimum Value | Maximum Value | ||
Disabled | 50 Ω | 0.708 | 1.00 |
1 kΩ | 1.35 | 1.90 | |
Open | 1.42 | 2.00 | |
Enabled | 50 Ω | 0.567 | 0.8 |
1 kΩ | 1.08 | 1.52 | |
Open | 1.14 | 1.6 |
|
|||||||
Absolute Differential Offset |
±1 mV (0 °C to 55 °C) |
||||||
Absolute common mode offset[5] |
±350 µV (0 °C to 55 °C) |
||||||
|
|
|||||
|
|||||
Channel-to-channel timing alignment accuracy[7] |
35 ps 25 ps, typical |
Output impedance |
50 Ω nominal, per connector[8] |
||||||||||||||||||||
|
|||||||||||||||||||||
Load impedance compensation |
Output amplitude is compensated for user-specified load impedance to ground. Performed in software. |
||||||||||||||||||||
Output coupling |
DC |
||||||||||||||||||||
Output enable |
Software-selectable. When disabled, output is terminated with a 50 Ω, 1 W resistor. |
||||||||||||||||||||
Maximum output overload[9] |
±8 V from a 50 Ω source |
||||||||||||||||||||
Waveform summing |
The output terminals support waveform summing, which means the outputs of multiple PXIe-5450 signal generators can be connected together.[10] |
|
|||||||
Analog filter |
4-pole filter for image suppression |
Passband Flatness | Flatness Correction Disabled | Flatness Correction Enabled[14],[15] | ||
---|---|---|---|---|
0 MHz to 60 MHz [15],[16] | 0.5 dB, typical | 0.24 dB 0.13 dB, typical |
||
60 MHz[15],[16] to 120 MHz [15],[17] | 1.9 dB, typical | 0.34 dB 0.19 dB, typical |
Passband Flatness | Flatness Correction Disabled | Flatness Correction Enabled[14], [15] | ||
---|---|---|---|---|
Channel-to-Channel Passband Flatness Matching 0 MHz to 60 MHz [15],[16] | 0.05 dB, typical | 0.03 dB, typical | ||
Channel-to-Channel Passband Flatness Matching 60 MHz[15],[16] to 120 MHz [15],[17] | 0.18 dB, typical | 0.04 dB, typical |
Frequency Range | SFDR Without Harmonics (dB) | SFDR With Harmonics (dB) | ||||
---|---|---|---|---|---|---|
DC to 7 MHz | 98 | 88 | ||||
DC to 200 MHz | 84 | 75 |
Frequency (MHz) | SFDR (dB) |
---|---|
10 | 70 (74)[21] |
60 | 68 (70)[21] |
100 | 62 |
120 | 62 |
160 | 62 |
Frequency (MHz) | SFDR (dB) |
---|---|
10 | 70 (74)[21] |
60 | 68 (73)[21] |
100 | 64 |
120 | 62 |
160 | 62 |
In-Band Tone Frequency (MHz) | Out of Band Spur Level (dBm) |
---|---|
0 to 20 | <–80 dBm |
20 to 50 | <–65 dBm |
|
Frequency (MHz) | THD (dBc) |
---|---|
10 | -75 |
20 | -70 |
40 | -68 |
80 | -68 |
100 | -68 |
120 | -78 |
160 | -83 |
Frequency (MHz) | IMD (dBc) |
---|---|
10 | -84 |
20 | -81 |
40 | -75 |
80 | -71 |
100 | -68 |
120 | -68 |
160 | -66 |
Amplitude Range | Average Noise Density | |||
---|---|---|---|---|
Vpk-pk | dBm |
![]() |
dBm/Hz | dBFS/Hz |
1 | 4.0 | 2.24 | -160 | -164 |
Sample Clock Source | Output Freq. (MHz) | System Phase Noise Density[28] (dBc/Hz) | System Output Integrated Jitter[28] | ||||
---|---|---|---|---|---|---|---|
100 Hz | 1 kHz | 10 kHz | 100 kHz | 1 MHz | |||
Internal, High Resolution Clock, 400 MS/s | 10 | <-121 | <-137 | <-146 | <-152 | <-153 | <350 fs |
100 | <-101 | <-119 | <-126 | <-136 | <-141 | <350 fs | |
CLK IN External 10 MHz Reference Clock, 400 MS/s | 10 | <-122 | <-135 | <-146 | <-152 | <-153 | <350 fs |
100 | <-105 | <-115 | <-126 | <-136 | <-141 | <350 fs |
Sample clock rate range |
12.2 kS/s to 400 MS/s |
Sample clock rate frequency resolution |
<5.7 μHz[33] |
Sample clock delay |
0 ns to 2 ns, independent per channel[34] |
Sample clock delay resolution |
10 ps nominal |
Sample clock timebase phase adjust |
±1 Sample clock timebase period |
Reference Clock Sources |
None (internal reference) PXI_CLK10 (backplane) CLK IN (front panel connector) |
Reference Clock Frequency[35] |
1 MHz to 100 MHz in increments of 1 MHz 100 MHz to 200 MHz in increments of 2 MHz 200 MHz to 400 MHz in increments of 4 MHz Default of 10 MHz |
Internal Reference Clock Frequency Accuracy[36] |
±0.01% |
External Sample clock source |
CLK IN front panel connector, with multiplication and division |
External Sample clock rate |
10 MS/s, 20 MS/s to 400 MS/s |
Sample Clock rate range |
12.2 kS/s to 400 MS/s |
Multiplication/Division factor range |
Varies depending on the external Sample clock rate |
External Sample clock delay |
0 ns to 2 ns, independent per channel[37] |
External Sample clock delay resolution |
10 ps, nominal |
External Sample clock timebase phase adjust |
±1 Sample clock timebase period |
External Sample clock timebase sources |
CLK IN front panel connector, with division |
External Sample clock timebase rate range |
200 MS/s to 400 MS/s |
Divide factor range |
1, 2 to 32768 in steps of 2 |
Sample Clock delay |
0 ns to 2 ns, independent per channel |
Sample Clock delay resolution |
10 ps nominal |
Direction |
Input |
||||||
Destinations |
Reference clock, Sample clock, or Sample clock timebase |
||||||
Frequency range |
1 MHz to 400 MHz[40] |
||||||
Input impedance |
50 Ω , nominal |
||||||
|
|||||||
|
|||||||
Duty cycle requirements |
45% to 55% |
||||||
Input coupling |
AC |
||||||
Voltage standing wave ratio (VSWR) |
1.3:1 up to 2 GHz, nominal |
Direction |
Output |
Sources |
Sample clock, divided by integer K (1≤ K ≤ 3, minimum[41]), Reference clock, or Sample clock timebase, divided by integer M (1 ≤ M ≤ 1048576) |
Frequency Range |
100 kHz to 400 MHz |
Output Voltage |
≥0.7 Vpk-pk into 50 Ω typical |
Maximum Output Overload |
3.3 Vpk-pk from a 50 Ω source |
Output Coupling |
AC |
VSWR |
1.3:1 up to 2 GHz nominal |
Direction |
Bidirectional |
||||||||||||||||||
Frequency Range |
DC to 200 MHz |
||||||||||||||||||
|
|||||||||||||||||||
|
Sources |
PFI<0..1> (SMB front panel connectors) PXI_Trig<0..7> (backplane connector) Immediate (does not wait for a trigger). Default. |
||||||||
Types |
Start trigger edge, Script trigger edge and level, Software trigger |
||||||||
Edge detection |
Rise, falling |
||||||||
Minimum pulse width |
25 ns |
||||||||
Delay from trigger to analog output with OSP disabled |
154 Sample clock timebase periods + 65 ns, nominal |
||||||||
Additional delay with OSP enabled |
Varies with OSP configuration |
||||||||
|
Destinations |
PFI<0..1> (SMB front panel connectors) PXI_Trig<0..6> (backplane connector) |
||||||
Types |
Marker<0..3>, Data Marker<0..1>[45], Ready for Start, Started, Done |
||||||
Quantum |
Marker position must be placed at an integer multiple of two samples. |
||||||
Width |
Adjustable, minimum of 2 samples. Default is 150 ns. |
||||||
|
Memory Usage |
The PXIe-5450 uses the Synchronization and Memory Core (SMC) technology in which waveforms and instructions share onboard memory. Parameters, such as number of segments in sequence list, maximum number of waveforms in memory, and number of samples available for waveform storage, are flexible and user defined. |
||||||
|
|||||||
Loop Count |
1 to 16,777,215 Burst trigger: Unlimited |
||||||
Quantum |
Waveform size must be an integer multiple of two samples. |
||||||
Output modes |
Arbitrary Waveform, Script, and Arbitrary Sequence |
Trigger Mode | Number of Channels | Arbitrary Waveform Mode | Arbitrary Sequence Mode >180 MS/s | Arbitrary Sequence Mode ≤180MS/s | |||
---|---|---|---|---|---|---|---|
Single | 1 | 4 | 2 | 2 | |||
2 | 4 | 4 | 4 | ||||
Continuous | 1 | 142 | 140 | 58 | |||
2 | 284 | 280 | 116 | ||||
Stepped | 1 | 210 | 154 | 54 | |||
2 | 420 | 308 | 108 | ||||
Burst | 1 | 142 | 1,134 | 476 | |||
2 | 284 | 2,312 | 952 |
Generation Mode | Number of Channels | 128 MB | 512 MB | ||
---|---|---|---|---|---|
Arbitrary Waveform Mode, Maximum Waveform Memory[48] | 1 | 67,108,352 | 268,434,944 | ||
2 | 33,553,920 | 134,217,216 | |||
Arbitrary Sequence Mode, Maximum Waveform Memory[49] | 1 | 67,108,352 | 268,434,944 | ||
2 | 33,553,920 | 134,217,216 | |||
Arbitrary Sequence Mode, Maximum Waveforms[50] | 1 | 1,048,575 | 4,194,303 | ||
2 | 524,287 | 2,097,151 | |||
Arbitrary Sequence Mode, Maximum Segments in a Sequence[51] | 1 | 8,388,597 | 33,554,421 | ||
2 | 4,194,293 | 16,777,205 |
Sample Rate | Number of Channels | 128 MB | 512 MB | ||
---|---|---|---|---|---|
400 MS/s | 1 | 0.17 seconds | 0.67 seconds | ||
2 | 0.084 seconds | 0.34 seconds | |||
25 MS/s | 1 | 2.68 seconds | 10.74 seconds | ||
2 | 1.34 seconds | 5.37 seconds | |||
100 kS/s | 1 | 11 minutes 11 seconds | 44 minutes 44 seconds | ||
2 | 5 minutes 35 seconds | 22 minutes 22 seconds |
OSP interpolation range |
2, 4, 8, 12, 16, 20 24 to 8,192 (multiples of 8) 8,192 to 16,384 (multiples of 16) 16,384 to 32,768 (multiples of 32) |
I/Q rate[53] |
(Sample Clock rate) ÷ (OSP interpolation) |
Bandwith[54] |
0.4 * I/Q rate, per output |
Data processing modes |
Real (I path only) or Complex (I/Q) |
OSP mode |
Baseband |
Filter Types | Parameter | Minimum | Maximum |
---|---|---|---|
Flat[58] | Passband | 0.4 | 0.4 |
Raised cosine[59] | Alpha | 0.1 | 0.4 |
Root raised cosine[60] | Alpha | 0.1 | 0.4 |
External Calibration |
The external calibration calibrates the ADC voltage reference and passband flatness. Appropriate constants are stored in nonvolatile memory. |
Self-Calibration |
An onboard, 24-bit ADC and precision voltage reference are used to calibrate the DC gain and offset. Onboard channel alignment circuitry is used to calibrate the skew between channels. The self-calibration is initiated by the user through the software and takes approximately 60 seconds to complete. Appropriate constants are stored in nonvolatile memory. |
Calibration Interval |
Specifications valid within 1 year of external calibration |
Warm-up Time |
15 minutes |
|
|||||||
|
|||||||
|
Dimensions |
3U, two-slot, PXI Express module 21.6 cm × 4.0 cm × 13.0 cm (8.5 in. × 1.6 in. × 5.1 in.) |
Weight |
476 g (17 oz) |
Maximum altitude |
2,000 m (800 mbar) (at 25 °C ambient temperature) |
Pollution Degree |
2 |
Operating shock |
30 g peak, half-sine, 11 ms pulse (Tested in accordance with IEC 60068-2-27. Meets MIL-PRF-28800F Class 2 limits.) |
||||||
|
This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:
For UL and other safety certifications, refer to the product label or the Online Product Certification section.
For EMC declarations and certifications, refer to the Online Product Certification section.
This product meets the essential requirements of applicable European Directives, as follows:
Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for this product, visit ni.com/certification, search by model number or product line, and click the appropriate link in the Certification column.
NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.
For additional environmental information, refer to the Minimize Our Environmental Impact web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.
At the end of the product life cycle, all NI products must be disposed of according to local laws and regulations. For more information about how to recycle NI products in your region, visit ni.com/environment/weee.
Gain Error within ±5 °C of Self-Cal temperature: ±0.2% x (2 V) = ±4 mV
Gain Error at + 10 °C of Self-Cal temperature: 4 mV + 0.03% x 5 x (2 V) = 7 mV
The first specification listed is for a 10.0 MHz sinusoid at a 400 MS/s sample rate (waveform contains 40 unique samples), while the specification in parentheses is for a 10.0 MHz sinusoid at a 399.9 MS/s sample rate (waveform contains over 3000 unique samples with unique DAC codes).
Generating sine wave at output frequency. System output jitter integrated from 100 Hz to 100 kHz.