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PXI-5402 Specifications

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    Last Modified: May 4, 2017

    Definitions

    Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.

    Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.

    • Typical specifications describe the expected performance met by a majority of the models.
    • Nominal specifications describe parameters and attributes that may be useful in operation.

    Specifications are Nominal unless otherwise noted.

    Conditions

    Specifications are valid under the following conditions unless otherwise noted:

    • Ambient temperature range of 0 °C to 55 °C
    • Analog filter enabled
    • Interpolation set to maximum allowed factor for a given sample rate
    • Signals terminated with 50 Ω
    • Full operating temperature range

    Typical specifications are valid under the following conditions unless otherwise noted:

    • Ambient temperature range of 15 °C to 35 °C

    CH 0

    Number of channels

    1

    Connector type

    BNC

    Output Voltage

    Maximum voltage

    ±5 V (ACpk + DC)

    DAC resolution

    14 bits

    Amplitude and Offset

    Amplitude range[1]

    50 Ω load

    5.64 mVpk-pk to 10 Vpk-pk

    High-impedance load

    11.28 mVpk-pk to 20 Vpk-pk

    Amplitude resolution

    <0.06% (0.004 dB) of amplitude range

    Offset range[2]

    Square waveforms

    ±50% of amplitude range

    All other waveforms

    ±5 V

    Accuracy

    AC amplitude accuracy[3]

    +2.0% of amplitude +1 mV

    -1.0% of amplitude -1 mV

    Offset accuracy[4]

    ±0.5% of offset ±2 mV ±0.5% of amplitude

    Output Characteristics

    Output impedance

    Software-selectable: 50 Ω or 75 Ω

    Output enable

    Software-selectable: When the output path is disabled, the CH 0 output is terminated to ground with a 1 W resistor with a value equal to the selected output impedance

    Maximum output overload

    The CH 0 output can be connected to a 50 Ω, ±12 V source without sustaining any damage. No damage occurs if the CH 0 output is shorted to ground indefinitely.

    Waveform summing

    Outputs of multiple PXI-5402 signal generators can be connected together

    Phase adjustment

    -180° to +180°

    Digital interpolation filter[5]

    Software-selectable: Finite Impulse Response (FIR) filter with available interpolation factors of 2 or 4

    Analog filter

    Software-selectable: 7-pole elliptical filter

    Frequency resolution

    0.355 μHz

    Maximum Frequencies for Common Functions

    Maximum frequencies[6]

    Sine

    20 MHz

    Square

    20 MHz

    Ramp

    1 MHz

    Triangle

    1 MHz

    User-defined[7]

    20 MHz
    Maximum sample rate

    Sine

    400 MS/s

    Square

    400 MS/s

    Ramp

    100 MS/s

    Triangle

    100 MS/s

    User-defined[7]

    400 MS/s

    Noise

    100 MS/s

    Sine Waves

    • Spectral characteristics may degrade when offset is applied.
    • Spectral characteristics at low amplitudes are limited by a -148 dBm/Hz noise floor.
    • Output amplitude of -1 dBFS is used for all spectral specifications.

    Passband flatness[8]

    ±0.4 dB (±5%)

    The data presented in the following figures were acquired with the Rohde & Schwarz NRVS Power Meter using the NRV-Z51 Thermal Power Sensor.

    Figure 1. Passband Flatness, Expected Voltage 10 Vpk-pk ( 23.98 dBm)
    Figure 2. Passband Flatness, Expected Voltage 1.66 Vpk-pk ( 8.38 dBm)
    Spurious-free dynamic range (SFDR)[9] with harmonics[10]

    <10 MHz

    50 dB, typical

    10 MHz to 20 MHz

    45 dB, typical

    SFDR[9] without harmonics[11]

    70 dB, typical

    Total harmonic distortion (THD)[12]
    DC to 1 MHz

    ≤1.66 Vpk-pk

    –60 dBc, typical

    >1.66 Vpk-pk

    –58 dBc, typical

    1 MHz to 20 MHz

    ≤1.66 Vpk-pk

    –41 dBc

    >1.66 Vpk-pk

    –32 dBc
    Signal to Noise and Distortion (SINAD)[11]
    DC to 1 MHz

    ≤1.66 Vpk-pk

    58 dBc

    >1.66 Vpk-pk

    58 dBc
    1 MHz to 20 MHz

    ≤1.66 Vpk-pk

    41 dBc

    >1.66 Vpk-pk

    32 dBc

    Average noise density

    –114 dBm/Hz
    Phase noise density[13]

    100 Hz

    –100 dBc/Hz

    1 kHz

    –110 dBc/Hz

    10 kHz

    –120 dBc/Hz

    Jitter (RMS)[14]

    <4.0 ps rms

    Square Waves

    Pulse response

    Rise/fall time

    <12 ns, typical

    Aberration (undershoot/overshoot)

    <5%, typical

    Duty cycle[15]

    <10 MHz

    20% to 80%

    10 MHz to 20 MHz

    50%
    Jitter (RMS)[16]

    <2 MHz

    0.01% of period + 500 ps, typical

    ≥2 MHz

    0.1% of period + 70 ps

    User-Defined Waves

    Waveform size

    16,384 samples

    Frequency List Mode

    Frequency steps

    1 to 58,235 steps

    Step duration

    1 ms to 21 s

    Sample Clock

    Source[17]

    Onboard VCXO

    Frequency accuracy[18]

    ±25 ppm

    Interpolation[19]

    1 (off)

    2

    4

    Destinations[20]

    SYNC OUT/PFI 0 (BNC front panel connector)

    PFI 1 (BNC front panel connector)

    PXI_Trig<0..6> (backplane connector)

    Maximum frequency[21]

    SYNC OUT/PFI 0

    100 MHz

    PFI 1

    100 MHz

    PXI_Trig<0..6>

    20 MHz
    Jitter[21]

    SYNC OUT/PFI 0

    6 ps rms, typical

    PFI 1

    12 ps rms, typical

    Duty cycle[21]

    SYNC OUT/PFI 0

    25% to 65%

    PFI 1

    25% to 65%

    Phase-Locked Loop (PLL) Reference Clock

    Sources[22]

    REF IN (BNC front panel connector)

    PXI_CLK10 (backplane connector)

    None

    Frequency accuracy[23]

    When using the PLL, the frequency accuracy of the PXI-5402 is solely dependent on the frequency accuracy of the PLL Reference Clock source

    Lock time

    200 ms, maximum

    70 ms, typical

    Frequency range[24]

    5 MHz to 20 MHz, in steps of 1 MHz. The default value is 10 MHz.

    Allowed duty cycle range

    40% to 60%

    Destinations

    SYNC OUT/PFI 0 (BNC front panel connector)

    PFI 1 (BNC front panel connector)

    PXI_Trig<0..6> (backplane connector)

    TClk Synchronization

    National Instruments TClk synchronization method and the NI-TClk instrument driver are used to align the Sample Clocks on any number of SMC-based modules in a chassis.

    • Specifications are valid for any number of PXI modules installed in one PXI-1042 chassis
    • All parameters are set to identical values for each SMC-based module
    • Sample Clock is set to 100 MS/s, Divide-by-N, and all filters are disabled
    • For other configurations, including multichassis systems, contact NI Technical Support at ni.com/support

    Intermodule SMC Synchronization Using NI-TClk for Identical Modules

    Skew[25]

    500 ps, typical

    Average skew after manual adjustment[26]

    <10 ps, typical

    Sample Clock delay/adjustment resolution

    ≤10 ps, typical

    spd-note-note
    Note  

    Although you can use NI-TClk to synchronize nonidentical modules, these specifications apply only to synchronizing identical modules.

    REF IN

    Connector type

    BNC

    Direction

    Input
    Input voltage range

    Sine wave

    0.63 Vpk-pk to 2.8 Vpk-pk into 50 Ω (0 dBm to +13 dBm)

    Square wave

    0.2 Vpk-pk to 2.8 Vpk-pk into 50 Ω

    Maximum input overload

    ±10 V (ACpk + DC)

    Input impedance

    50 Ω

    Input coupling

    AC

    SYNC OUT/PFI 0 and PFI 1

    Connector type

    BNC (x2)

    Direction

    Bidirectional

    Frequency range

    DC to 100 MHz
    As an input (trigger)

    Destination

    Start Trigger

    Maximum input overload

    -2 V to +7 V (ACpk + DC)

    VIH

    2.0 V

    VIL

    0.8 V

    Input impedance

    1 kΩ
    As an output (event)

    Sources

    Sample Clock divided by integer K (1 ≤ K ≤ 4,194,304)

    PLL Reference Clock

    Exported Start Trigger (Out Start Trigger)

    SYNC OUT

    Output impedance

    50 Ω

    Maximum output overload

    -2 V to +7 V (ACpk + DC)
    Minimum VOH[27]

    50 Ω load

    1.4 V

    High-impedance load

    2.9 V
    Maximum VOL[27]

    50 Ω load

    0.2 V

    High-impedance load

    0.2 V

    Rise/fall time (20% to 80%)[28]

    ≤2.0 ns

    Sync

    Sync duty cycle

    20% to 80%
    Jitter (RMS)[29]

    <2 MHz

    0.01% of period + 500 ps, typical

    ≥2 MHz

    0.1% of period + 70 ps

    Start Trigger

    Sources

    SYNC OUT/PFI 0 (BNC front panel connector)

    PFI 1 (BNC front panel connector)

    PXI_Trig<0..7> (backplane connector)

    PXI Star Trigger (backplane connector)

    Software (use node or function call)

    Immediate (does not wait for a trigger.) The default is Immediate.

    Modes

    Single

    Continuous

    Stepped

    Burst

    Edge detection

    Rising

    Falling

    Level high

    Level low

    Minimum pulse width

    25 ns
    Delay from Start Trigger to CH 0 analog output

    Sine waveforms

    1,100 ns, typical

    Square waveforms

    1,100 ns + 0.5% of period, typical

    All other waveforms

    900 ns

    Destinations

    SYNC OUT/PFI 0 (BNC front panel connector)

    PFI 1 (BNC front panel connector)

    PXI_Trig<0..6> (backplane connector)

    Exported trigger delay

    65 ns, typical

    Exported trigger pulse width

    >150 ns

    Calibration

    Self-calibration

    An onboard, 24-bit ADC and precision voltage reference are used to calibrate the gain and offset. Square waveform duty cycle is also calibrated. The self-calibration is initiated by the user through the software and takes approximately 105 seconds to complete.

    External calibration[30]

    External calibration calibrates the VCXO, voltage reference, self-calibration ADC, flatness, gain, and offset. Appropriate constants are stored in nonvolatile memory.

    Calibration interval

    Specifications valid within two years of external calibration

    Warm-up time

    15 minutes

    Power

    +3.3 VDC

    1.4 A

    +5 VDC

    Refer to the following figure

    +12 VDC

    0.11 A

    -12 VDC

    0.01 A

    Total power

    17.6 W
    Figure 3. 5 V Current Versus Frequency and Amplitude

    Environment

    Maximum altitude

    2,000 m (at 25 °C ambient temperature)

    Pollution Degree

    2

    Indoor use only.

    Operating Environment

    Ambient temperature range

    0 °C to 55 °C (Tested in accordance with IEC 60068-2-1 and IEC 60068-2-2.)

    0 °C to 45 °C (Tested in accordance with IEC 60068-2-1 and IEC 60068-2-2.) when installed in a PXI-101x or PXI-1000 chassis

    Relative humidity range

    10% to 90%, noncondensing (Tested in accordance with IEC 60068-2-56.)

    Storage Environment

    Ambient temperature range

    -25 °C to 85 °C (Tested in accordance with IEC 60068-2-1 and IEC 60068-2-2.)

    Relative humidity range

    5% to 95%, noncondensing (Tested in accordance with IEC 60068-2-56.)

    Shock and Vibration

    Shock

    Operating[31]

    30 g peak, half-sine, 11 ms pulse (Tested in accordance with IEC 60068-2-27. Test profile developed in accordance with MIL-PRF-28800F.)

    Storage

    50 g peak, half-sine, 11 ms pulse (Tested in accordance with IEC 60068-2-27. Test profile developed in accordance with MIL-PRF-28800F.)

    Random vibration

    Operating[31]

    5 Hz to 500 Hz, 0.31 grms (Tested in accordance with IEC 60068-2-64.)

    Nonoperating

    5 Hz to 500 Hz, 2.46 grms (Tested in accordance with IEC 60068-2-64. Test profile exceeds the requirements of MIL-PRF-28800F, Class 3.)

    Physical Characteristics

    Dimensions

    3U, one-slot, PXI/cPCI module

    21.6 cm × 2.0 cm × 13.0 cm (8.5 in. × 0.8 in. × 5.1 in.)

    Weight

    351 g (12.4 oz)

    Compliance and Certifications

    Safety

    This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:

    • IEC 61010-1, EN 61010-1
    • UL 61010-1, CSA C22.2 No. 61010-1
    spd-note-note
    Note  

    For UL and other safety certifications, refer to the product label or the Online Product Certification section.

    Electromagnetic Compatibility

    This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:
    • EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
    • EN 55011 (CISPR 11): Group 1, Class A emissions
    • AS/NZS CISPR 11: Group 1, Class A emissions
    • FCC 47 CFR Part 15B: Class A emissions
    • ICES-001: Class A emissions
    spd-note-note
    Note  

    In the United States (per FCC 47 CFR), Class A equipment is intended for use in commercial, light-industrial, and heavy-industrial locations. In Europe, Canada, Australia, and New Zealand (per CISPR 11), Class A equipment is intended for use only in heavy-industrial locations.

    spd-note-note
    Note  

    Group 1 equipment (per CISPR 11) is any industrial, scientific, or medical equipment that does not intentionally generate radio frequency energy for the treatment of material or inspection/analysis purposes.

    spd-note-note
    Note  

    For EMC declarations and certifications, refer to the Online Product Certification section.

    CE Compliance

    This product meets the essential requirements of applicable European Directives, as follows:

    • 2014/35/EU; Low-Voltage Directive (safety)
    • 2014/30/EU; Electromagnetic Compatibility Directive (EMC)

    Online Product Certification

    Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for this product, visit ni.com/certification, search by model number or product line, and click the appropriate link in the Certification column.

    Environmental Management

    NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.

    For additional environmental information, refer to the Minimize Our Environmental Impact web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.

    Waste Electrical and Electronic Equipment (WEEE)

    spd-note-weee
    EU Customers  

    At the end of the product life cycle, all NI products must be disposed of according to local laws and regulations. For more information about how to recycle NI products in your region, visit ni.com/environment/weee.

    电子信息产品污染控制管理办法（中国RoHS）

    spd-note-china-rohs
    中国客户  

    National Instruments符合中国电子信息产品中限制使用某些有害物质指令(RoHS)。关于National Instruments中国RoHS合规性信息，请登录 ni.com/environment/rohs_china。(For information about China RoHS compliance, go to ni.com/environment/rohs_china.)

    • 1 NI-FGEN compensates for user-specified resistive loads.
    • 2 Output limited by the maximum voltage specification.
    • 3 50 kHz sine wave. High-impedance load.
    • 4 High-impedance load.
    • 5 The digital filter is not available for use for Sample Clock rates below 10 MS/s.
    • 6 The minimum frequency is 0 Hz.
    • 7 Interpolation set to 4.
    • 8 With respect to 50 kHz.
    • 9 Dynamic range is defined as the difference between the carrier level and the largest spur.
    • 10 Measured from DC to 50 MHz. Also called harmonic distortion.
    • 11 Measured from DC to 50 MHz.
    • 12 Includes the 2nd through the 6th harmonics.
    • 13 Sine wave at 10 MHz.
    • 14 Integrated from 100 Hz to 100 kHz. Sine wave at 10 MHz.
    • 15 You can adjust duty cycle from 20% to 80% at higher frequencies, but the signal integrity degrades. For better waveforms at these duty cycles, use the SYNC OUT connector.
    • 16 Integrated from 100 Hz to 100 kHz.
    • 17 Refer to the Phase-Locked Loop (PLL) Reference Clock section for more information.
    • 18 PLL Reference source set to None.
    • 19 Applicable to user-defined waveform modes.
    • 20 Exported Sample Clocks can be divided by integer K (1 ≤ K ≤ 4,194,304).
    • 21 Integrated from 100 Hz to 100 kHz.
    • 22 The PLL Reference Clock provides the reference frequency for the PLL.
    • 23 If the PLL Reference source is set to None, refer to the Sample Clock frequency accuracy specification.
    • 24 To guarantee locking, the PLL Reference Clock frequency must be accurate to ±50 ppm.
    • 25 Caused by clock and analog path delay differences. No manual adjustment performed.
    • 26 For information about manual adjustment, search ni.com for NI-TClk Synchronization Repeatability Optimization or for help with the adjustment process, contact NI Technical Support at ni.com/support.
    • 27 Output drivers are +3.3 V TTL compatible.
    • 28 Load of 10 pF.
    • 29 Integrated from 100 Hz to 100 kHz.
    • 30 Also known as factory calibration.
    • 31 Spectral and jitter specifications could degrade.

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