Table Of Contents

PXIe-5172 Front Panel and Pinout

Version:
    Last Modified: July 19, 2019

    Front Panel


    Table 1. Connectors
    Signal Connector Type Description
    CH 0 through CH 7 SMB Analog input connection; digitizes data and triggers acquisitions
    AUX 0 MHDMR Sample Clock or Reference Clock input, Reference Clock output, bidirectional digital PFI, and 3.3 V power output

    AUX 0 Connector Pinout


    Table 2. AUX 0 Connector Pin Assignments
    Pin Signal Signal Description
    1 GND Ground reference for signals
    2 CLK IN Used to import an external Reference Clock or Sample Clock
    3 GND Ground reference for signals
    4 GND Ground reference for signals
    5 CLK OUT Used to export the Reference Clock
    6 GND Ground reference for signals
    7 GND Ground reference for signals
    8 AUX 0/PFI 0 Bidirectional PFI line
    9 AUX 0/PFI 1 Bidirectional PFI line
    10 GND Ground reference for signals
    11 AUX 0/PFI 2 Bidirectional PFI line
    12 AUX 0/PFI 3 Bidirectional PFI line
    13 GND Ground reference for signals
    14 AUX 0/PFI 4 Bidirectional PFI line
    15 AUX 0/PFI 5 Bidirectional PFI line
    16 AUX 0/PFI 6 Bidirectional PFI line
    17 AUX 0/PFI 7 Bidirectional PFI line
    18 +3.3 V +3.3 V power (200 mA maximum)
    19 GND Ground reference for signals

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