Byte order in the frame payload (ring).
This property defines how signal bytes are ordered in the frame payload when the frame is loaded in memory.
(Intel): Higher significant signal bits are placed on higher byte addresses.
(Motorola): Higher significant signal bits are placed on lower byte addresses.
property does not contain a valid value, and you create an XNET session that uses this signal, the session returns an error. To ensure that the property contains a valid value, you can do one of the following:
- Use a database file (or alias) to create the session. The file formats require a valid value in the text for this property.
- Set a value in LabVIEW using the property node. This is needed when you create your own in-memory database (:memory:) rather than use a file. The property does not contain a default value in this case, so you must set a valid value prior to creating a session.
Little Endian Signal with Start Bit 12
Big Endian Signal with Start Bit 12
Where This Property Is Available:
Desktop OS: Windows
FPGA: Not supported
Web Server: Not supported in VIs that run in a web application