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Last Modified: February 7, 2020

Controls the transition of the interface to the POC:halt-state due to a clock synchronization errors (boolean).

If set to true, the node can transition to the POC: halt state. If set to false, the node does not transition to the POC: halt state and remains in the POC: normal passive state, allowing for self recovery.

This property corresponds to the pAllowHaltDueToClock node parameter in the FlexRay Protocol Specification.

The property is a Boolean flag. The default value of this property is false.

You can overwrite the default value by writing a value within the specified range to this property prior to starting the FlexRay interface. Refer to XNET Read (State FlexRay Comm) for more information about the POC: halt and POC: normal passive states.

Data type: datatype_icon

Long Name: Interface:FlexRay:Allow Halt Due to Clock?

Class: XNET Session

Permissions: Read/Write

Where This Property Is Available:

Desktop OS: Windows

FPGA: Not supported

Web Server: Not supported in VIs that run in a web application

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