Table Of Contents

Construct ATR (G Dataflow)

Last Modified: April 2, 2018

Constructs the value that the Write ATR Register node uses to write to an ATR register for advanced daughterboard configuration.

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daughterboard

Daughterboard type to construct the register value for.

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antenna configuration

The antenna state of the daughterboard.

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lo lpf enable

LO LPF state of the daughterboard.

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rx.configuration

The settings to use for the Rx side of the daughterboard, including power enable, mixer enable, and gain.

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tx.configuration

The settings to use for the Tx side of the daughterboard, including power enable, mixer enable, and gain.

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spi address

Specifies the destination for configuration packets sent to the daughterboard. Valid only for USRP-29x4 devices.

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cpld enable

Specifies the CPLD power state on the daughterboard. Valid only for USRP-29x4 devices.

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atr register value

32-bit value to program an ATR register with.

Where This Node Can Run:

Desktop OS: Windows

FPGA: Not supported

Web Server: Not supported in VIs that run in a web application


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