Specifies the data rate of samples coming from the analog-to-digital converters (ADCs) to the DSP or going to the digital-to-analog converters (DACs) from the DSP.
Only the USRP-2900/2901 supports changing the data clock rate.
Long Name: Clocking and Synchronization:Data Clock Rate
Where This Property Is Available:
Desktop OS: Windows
FPGA: Not supported
Web Server: Not supported in VIs that run in a web application
This property supports the following hardware: