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Data Clock Rate

Last Modified: May 22, 2018

Specifies the data rate of samples coming from the analog-to-digital converters (ADCs) to the DSP or going to the digital-to-analog converters (DACs) from the DSP.

Only the USRP-2900/2901 supports changing the data clock rate.

Data type: datatype_icon

Long Name: Clocking and Synchronization:Data Clock Rate

Class: NI-USRP

Permissions: Read/Write

Channel-based No
Resettable Yes

Where This Property Is Available:

Desktop OS: Windows

FPGA: Not supported

Web Server: Not supported in VIs that run in a web application

Hardware Support:

This property supports the following hardware:

  • USRP-2900/2901
  • USRP-2920/2921/2922
  • USRP-2930/2932
  • USRP-2940/2942/2943/2944/2945
  • USRP-2950/2952/2953/2954/2955

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