Table Of Contents
PXI_Trig Reset DDS Cntrs
Version:
Last Modified: September 9, 2019
Specifies or returns whether the DDS clock dividers should reset when the device receives an update pulse on the PXI_Trig line specified in the Reset Synchronization Clock PXI_Trig Line parameter.
If TRUE, the DDS clock dividers reset on the rising edge of the update pulse.
Data type:
Where This Property Is Available:
Desktop OS: Windows
FPGA: Not supported
Web Server: Not supported in VIs that run in a web application