Enabling and Configuring a Phase-Locked Loop

Complete the following steps to use an NI-Sync device's PLL circuit to phase lock the oscillator of the system timing module to an external clock.

1. Connect an external clock to the ClkIn connector on the front panel of the module in the system timing slot of the chassis.
2. Place Initialize on the diagram. Select the module in the chassis' system timing slot for resource name.
3. Place niSync Properties on the diagram.
4. Select Clk Properties» Use PLL? for the first parameter of niSync Properties and set its value to True.
5. Add another parameter to the niSync Properties and select Clk Properties» PLL Frequency for the second parameter.
6. Right click the PLL Frequency parameter and select Change to Write.
7. Wire a control or constant to the PLL Frequency parameter and enter the frequency of the external clock connected to ClkIn. Refer to the device's hardware manual for the reference frequency range supported by the device's PLL circuit. The oscillator of the NI-Sync device is configured to phase-lock to the external clock connected at ClkIn. The oscillator locks to the frequency you specified in the PLL Frequency parameter.