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Pause Trigger Considerations for C Series Devices

Last Modified: August 10, 2018

The source of your sample clock often can affect when your acquisition or generation pauses and resumes with the assertion and deassertion of a Pause Trigger.

Counter Input for the NI 9361

When you acquire counter input signals, the acquisition pauses as soon as Pause Trigger is asserted. If the source of your sample clock is the onboard clock, the acquisition resumes after the Pause Trigger is deasserted, and the leftover period (A) elapses. The leftover period is the unknown time in the sample clock period in which the pause trigger occurred. In the following image, T represents the signal period and A represents the unknown time between the clock pulse and the pause trigger.

If you are using any signal other than the onboard clock as the source of your sample clock, the acquisition resumes as soon as the Pause Trigger is deasserted and another edge of the sample clock is received as shown in the following figure.

To pause an edge counting task, use the CountEdges.Gate attributes/properties.

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