Table Of Contents
Ref.AnlgEdge.DigFltr.Enable
Version:
Last Modified: May 21, 2018
Specifies whether to apply a digital filter to the digital output of the analog triggering circuitry (the Analog Comparison Event). When enabled, the analog signal must stay above or below the trigger level for the minimum pulse width before being recognized. Use filtering for noisy trigger signals that transition in and out of the hysteresis window rapidly.
Data type: 
Long Name: Trigger:Reference:Analog Edge:Digital Filter:Enable
Class: DAQmx Task
Permissions: Read/Write
Where This Property Is Available:
Desktop OS: Windows
FPGA:
Web Server: Not supported in VIs that run in a web application