From 12:00 AM CDT Sunday, October 17 - 11:30 AM CDT Sunday, October 17, will be undergoing system upgrades that may result in temporary service interruption.

We appreciate your patience as we improve our online experience.

Table Of Contents

ni579x Synchronization Registers (Clock-Driven Logic)

    Last Modified: August 4, 2018

    Sets/gets the configuration values for the Synchronization library by connecting to the Register Bus.


    register instruction

    Specifies a read or write register instruction. This parameter is usually obtained from the register instruction parameter of the Process node in the Register Bus FPGA library. The source of this parameter defines the instances of the Register Bus library to which the Config library instance is wired and is communicated from the host.



    Identifies the Synchronization instance. Sync.resources is obtained from ni579x Create.


    read completion

    Indicates whether the register read operation is complete, and returns the data from the register read. Wire this parameter through either a shift register or a feedback node back to the read completion parameter on Process of the Register Bus.


    ready for input

    A Boolean that indicates whether this node is ready to write new data to the FIFO in the next clock cycle.

    TRUE Indicates that this node is ready to write new data to the FIFO.
    FALSE Indicates that this node is not ready to write new data to the FIFO.

    Where This Node Can Run:

    Desktop OS: none

    FPGA: Supported

    Web Server: Not supported in VIs that run in a web application

    Recently Viewed Topics