Table Of Contents
Lead Lag (G Dataflow)
Implements a PID controller with a lead or lag function, which is generally used as a dynamic compensator in feedforward control schemes.
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reset
input
Input signal.
This input accepts a double-precision, floating-point number or an array of double-precision, floating-point numbers.
tuning parameters
Tuning parameters to adjust the controller.
This input accepts a cluster or an array of clusters.
gain
DC gain. Setting gain to a negative value produces an inverting amplifier with an additional 180-degree phase shift.
lag time
Phase lag in seconds. A value of zero turns off the lag.
lead time
Phase lead in seconds. A value of zero turns off the lead. Large lead time values might result in a wild oscillation of the output.
dt
Loop-cycle time or interval, in seconds, at which this node is called.
dt must be greater than zero.
output
Control output of the PID algorithm that is applied to the controlled process.
This output can return a double-precision, floating-point number or an array of double-precision, floating-point numbers.
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported
Web Server: Not supported in VIs that run in a web application