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Table Of Contents

Digital Data Constant (G Dataflow)

Last Modified: December 18, 2017

Represents a digital table on the diagram. The digital table can represent data in up to six digital states.

Value Digital Data State Description
0 0 (Drive Low) Forces logic low. Drives to the low voltage level (VOL).
1 1 (Drive High) Forces logic high. Drives to the high voltage level (VOH).
2 Z (Force Off) Forces logic high impedance. Turns the driver off.
3 L (Compare Low) Compares logic low (edge). Compares a voltage level lower than the low voltage threshold.
4 H (Compare High) Compares logic high (edge). Compares a voltage level higher than the high voltage threshold.
5 X (Compare Unknown) Compares logic unknown. Does not compare.

Where This Node Can Run:

Desktop OS: Windows

FPGA: This product does not support FPGA devices

Web Server: Not supported in VIs that run in a web application

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