Inverts the specified digital data so that a 0 becomes a 1 and vice versa or an H becomes an L and vice versa.
The digital waveform that you want to invert.
This input appears when you wire a waveform to digital data. If you wire digital data to digital waveform, this input changes to digital data.
Set of digital data that you want to invert.
This input appears when you wire digital data to digital waveform. If you wire a waveform to digital data, this input changes to digital waveform.
Node behavior if any value in the digital input is not a 0, 1, H, or L.
Name | Value | Description |
---|---|---|
Warn but Convert | 0 | Any values that are not 0, 1, H, or L are left unchanged and a warning is returned in error out. |
Fail | 1 | The node returns an empty inverted digital output and returns an error in error out. |
Default: 0—Warn but Convert
Error conditions that occur before this node runs. Unlike most nodes, this node runs normally even if an error occurs before this node runs.
Default: no error
The signal at which to begin inverting data.
Default: 0—Inverts all signals.
Number of signals to invert, beginning with the signal at signal index.
Default: -1
The inverted waveform.
This output appears when you wire a waveform to digital data. If you wire digital data to digital waveform, this output changes to inverted digital data.
The inverted digital data.
This output appears when you wire digital data to digital waveform. If you wire a waveform to digital data, this output changes to inverted digital waveform.
Error information.
The node produces this output according to standard error behavior.
Standard Error Behavior
Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.
Where This Node Can Run:
Desktop OS: Windows
FPGA: This product does not support FPGA devices