Table Of Contents

PDM Acquisition Toolkit Specifications for USB-7845R/7846R

Version:
    Last Modified: March 31, 2021

    Refer to these specifications when using the LabVIEW PDM Acquisition Toolkit with the USB-7845R/7846R.

    Input Characteristics

      Acquisition Generation
    Number of PDM data lines 8, consisting of one bank of 8 data lines and 2 clock lines 8
    Number of PDM channels 16 16
    Number of timing engines 1 1
    Clock input/output Clock output—One master bit clock shared across 8 data lines (16 channels) Clock input—One input shared across all output channels
    Data, clock, and GPIO logical level Single-ended logic 1.2 V, 1.8 V, and 3.3 V Single-ended logic 1.2 V, 1.8 V, and 3.3 V
    PDM clock rate 10 to 4800 kb/s, master mode only 10 to 4800 kb/s, slave mode only
    Timebase reference source PXI Express 100 MHz N/A
    Timebase accuracy error
    Divided clock <2%, 250 ps peak-peak jitter N/A
    DDS clock <100 ppm, 8.3 ns peak-peak jitter N/A
    Phase/Synchronization All channels within a bank of 8 data lines are sampled synchronously from a common clock. Phase relationship between channels is fully maintained. Channels within a task are synchronized. All channels are generated synchronously from the input clock. Phase relationship between channels is fully maintained.
    Generation signal types N/A Sine, chirp (linear or logarithmic), white noise, and custom periodic signals
    General purpose digital I/O (GPIO) 8 static GPIO lines can be configured independently as input or output lines 8 static GPIO lines can be configured independently as input or output lines

    Refer to the Bank to Channel Mapping for USB-7845R/7846R for the layout of banks, data lines, channels, and clock lines.

    Decimation Filters

    Decimation factor options 24, 32, 48, 64, 96, and 128. Select the option by task.

    Decimation Filter Specifications

    Decimation Factor 24 and 48 32 and 64 96 and 128
    Normalized passband frequency 0.4275 0.438 0.45
    Passband ripple (dB) ±0.0025 ±0.001 ±0.0004
    Normalized stopband frequency 0.5725 0.562 0.55
    Stopband attenuation (dB) >110 >120 >123
    Filter output delay (samples) 23 30 38

    Acquisition and Generation Control

      Acquisition Generation
    Acquisition options Raw PDM and/or PCM (decimated) data N/A
    Acquisition/Generation mode Finite or Continuous Continuous
    Trigger options Immediate only Immediate only
    Export signal options N/A None
    Acquisition pre-delay Common pre-delay for each task applied to both PDM and PCM data N/A
    Acquisition pre-delay resolution 1 PDM bitrate period N/A
    Acquisition pre-delay range 0 to 16383 bitrate periods N/A
    Acquisition post-delay Common post-delay for each task and applied to decimated data N/A
    Acquisition post-delay resolution 1 decimated data period N/A
    Acquisition post-delay range 0 to 227-2 (134,217,726) decimated data periods N/A

    Simulation Mode

    PDM simulation signal type Sine tone with a PDM amplitude of ±0.7071 FS (0.500 RMS)
    Tone frequency Proportional to the selected PDM rate.
    For a PDM rate of 3.072 MHz, tone frequency is 1 kHz for the first PDM channel input and increments by 1 kHz for each PDM channel input. The following table illustrates the tone frequencies at 3.072 MHz for all 16 PDM channel inputs.
    PDM Channel Input 0L 1 kHz
    PDM Channel Input 0R 2 kHz
    ...  
    PDM Channel Input 7L 15 kHz
    PDM Channel Input 7R 16 kHz

    Refer to the Bank to Channel Mapping for USB-7845R/7846R for the layout of banks, data lines, channels, and clock lines.

    Tone start phase 0 degree for all tones when using the Configure PDM Trigger (None) VI

    Bank to Channel Mapping for USB-7845R/7846R

    The following table illustrates the bank to channel mapping for the USB-7845R/7846R.

    Bank 0 PDM Data Input 0 PDM Channel Input 0L
    PDM Channel Input 0R
    ... .
    .
    .
    PDM Data Input 7 PDM Channel Input 7L
    PDM Channel Input 7R
    Clock 0,1

    Connector Pin Assignments for USB-7845R/7846R PDM Acquisition

    Use the following connector pin assignments when you configure pin functions for PDM acquisition using the USB-7845R/7846R.

    Connector 0

    Terminal Function Assignment
    1 DIO31  
    2 GND  
    3 DIO29  
    4 GND  
    5 DIO27  
    6 GND  
    7 DIO25  
    8 GND  
    9 DIO23  
    10 GND  
    11 DIO21  
    12 GND  
    13 DIO19  
    14 GND  
    15 DIO17 GPIO 7
    16 GND  
    17 DIO15 GPIO 5
    18 GND  
    19 DIO13 PDM Clock Output 1
    20 GND  
    21 DIO11 PDM Input 7
    22 GND  
    23 DIO9 PDM Input 5
    24 GND  
    25 DIO7 PDM Input 3
    26 GND  
    27 DIO5 GPIO 3
    28 GND  
    29 DIO3 GPIO 1
    30 GND  
    31 DIO1 PDM Input 1
    32 GND  
    33 GND
    34 GND
    35 DIO30  
    36 GND
    37 DIO28  
    38 GND
    39 DIO26  
    40 GND
    41 DIO24  
    42 GND
    43 DIO22  
    44 GND
    45 DIO20  
    46 GND
    47 DIO18 GPIO 6
    48 GND
    49 DIO16  
    50 GND
    51 DIO14 PDM Input 6
    52 GND
    53 DIO12 GPIO 4
    54 GND
    55 DIO10 GPIO 2
    56 GND
    57 DIO8 GPIO 0
    58 GND
    59 DIO6 PDM Input 4
    60 GND
    61 DIO4 PDM Input 2
    62 GND
    63 DIO2 PDM Input 0
    64 GND
    65 DIO0 PDM Clock Output 0
    66 GND
    67 External Clock x*
    68 GND
    * x is the connector number. External Clock x is an input only.

    Connector Pin Assignments for USB-7845R/7846R PDM Generation

    Use the following connector pin assignments when you configure pin functions for PDM generation using the USB-7845R/7846R.

    Connector 0

    Terminal Function Assignment
    1 DIO31  
    2 GND  
    3 DIO29  
    4 GND  
    5 DIO27  
    6 GND  
    7 DIO25  
    8 GND  
    9 DIO23  
    10 GND  
    11 DIO21  
    12 GND  
    13 DIO19  
    14 GND  
    15 DIO17 GPIO 7
    16 GND  
    17 DIO15 GPIO 5
    18 GND  
    19 DIO13  
    20 GND  
    21 DIO11 PDM Output 7
    22 GND  
    23 DIO9 PDM Output 5
    24 GND  
    25 DIO7 PDM Output 3
    26 GND  
    27 DIO5 GPIO 3
    28 GND  
    29 DIO3 GPIO 1
    30 GND  
    31 DIO1 PDM Output 1
    32 GND  
    33 GND
    34 GND
    35 DIO30  
    36 GND
    37 DIO28  
    38 GND
    39 DIO26  
    40 GND
    41 DIO24  
    42 GND
    43 DIO22  
    44 GND
    45 DIO20  
    46 GND
    47 DIO18 GPIO 6
    48 GND
    49 DIO16  
    50 GND
    51 DIO14 PDM Output 6
    52 GND
    53 DIO12 GPIO 4
    54 GND
    55 DIO10 GPIO 2
    56 GND
    57 DIO8 GPIO 0
    58 GND
    59 DIO6 PDM Output 4
    60 GND
    61 DIO4 PDM Output 2
    62 GND
    63 DIO2 PDM Output 0
    64 GND
    65 DIO0 PDM Clock Output 0
    66 GND
    67 External Clock x*
    68 GND
    * x is the connector number. External Clock x is an input only.

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