Opens a reference to an FPGA bitfile or an FPGA application in simulation. This node executes the referenced bitfile or application by default.
Select a bitfile or application to reference in the following ways depending on which mode you choose on the Item tab.
Transferring Data between a Target and Host Using FIFOs
Interface of the FPGA bitfile that this node returns a reference to.
This input is available only if you select
on the Item tab.Defining an Interface for the FPGA Reference
To define an interface for the FPGA reference, complete the following steps:
Device name of the FPGA target on which you want to run the bitfile. For local targets, use the device name on the Item tab of the target in SystemDesigner. For remote targets, use the following format for the device name: rio://hostname/DeviceName. For example, rio://10.34.2.40/RIO0.
If you set this node to the Simulate application on this computer mode, the node ignores this input.
Path to the bitfile. The resources and resource data types in the bitfile must match the interface you define in host interface.
Bitfiles must have a .lvbitx extension. This node supports bitfiles built with the following software:
A Boolean that determines whether the bitfile or application executes immediately after the node opens a reference to it. In most scenarios, wire a False constant to this input to make sure the bitfile or application resets properly after each execution.
True | The bitfile or application executes when the node opens a reference to it. |
False | The bitfile or application does not execute when the node opens a reference to it. Use the Download FPGA VI and Run FPGA VI nodes to explicitly download and run the bitfile or application. This action ensures that the bitfile or application is properly reset by replacing the code on the FPGA before each execution. |
Default: True
Error conditions that occur before this node runs.
The node responds to this input according to standard error behavior.
Standard Error Behavior
Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.
Default: No error
Reference to the bitfile or application.
Error information.
The node produces this output according to standard error behavior.
Standard Error Behavior
Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported
Web Server: Not supported in VIs that run in a web application