From 1:00 AM - 6:00 AM CST on Saturday, January 23, ni.com will be undergoing system upgrades that may result in temporary service interruption.
We appreciate your patience as we improve our online experience.
From 1:00 AM - 6:00 AM CST on Saturday, January 23, ni.com will be undergoing system upgrades that may result in temporary service interruption.
We appreciate your patience as we improve our online experience.
Retrieves data you request with Request Data from DRAM.
Reference to a DRAM memory item.
Boolean value that specifies whether downstream nodes are ready for this node to return a new value.
Use Feedback Node to wire this input to the ready for input input of a downstream node. If this input is False during a given cycle, output valid returns False during that cycle.
True | The downstream node is ready for the next data element. |
False | The downstream node is not ready for the next data element. |
Default: False
Reference to a DRAM memory item.
The data this node retrieves from the DRAM memory on the FPGA target.
Boolean value that indicates whether this node computes a result that downstream nodes can use.
Wire this output to the input valid input of a downstream node to transfer data from the node to the downstream node.
True | Downstream nodes can use the result this node computes. |
False | This node returns an undefined value that downstream nodes cannot use. |
Where This Node Can Run:
Desktop OS: none
FPGA: All devices
Web Server: Not supported in VIs that run in a web application