Table Of Contents

AXI4-Stream Switch (Clock-Driven Logic)

Last Modified: November 4, 2020

Provides the infrastructure to connect multiple AXI4-Stream masters and slaves.

On the Item tab, click Configure Xilinx IP to configure inputs and outputs for this node.

Need License: No

Interface: AXI4-Stream


Where This Node Can Run:

Desktop OS: none

FPGA: All devices

Web Server: Not supported in VIs that run in a web application

Recently Viewed Topics