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Test Portions of Your FPGA Application with Testbench VIs

Last Modified: January 11, 2018

Create a testbench VI on the host of the FPGA application to test code in your application using the full range of debugging tools in the development environment.

A testbench VI generates a set of data that you can use to test the functionality and limits of a unit or component in your application. You create the code that generates the sample data, so you can focus on specific issues or limits of the code under test. You can also use a predefined set of data as the VI data source, depending on the requirements of your application.


Generate sample data that is similar to the data you expect the code under test to handle in the deployed application. Conducting tests using real-life circumstances improves the likelihood that the code under test will behave as you expect after you deploy the application to live hardware.

After the code under test finishes executing using the sample data, the testbench VI displays the results of the code. You can configure the panel of the testbench VI to display information you gather about the specific parts of the code under test that you are investigating.

Considerations when Creating Testbench VIs

When you create a testbench VI, determine the following aspects of the VI to ensure that it generates data similar to the data the deployed application will handle:

  • Data type for the input samples
  • Number of samples to send through the code under test
  • Output format to display the results of the testbench VI execution

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