Create the following diagram to organize a deterministic and non-deterministic task in a real-time VI.
|Place a deterministic task in a Timed Loop. A Timed Loop executes each iteration at the period and priority you specify. The highest priority Timed Loop executes before lower priority items in a VI or application.|
|Place a non-deterministic task in a While Loop. In this example, the While Loop includes an indicator that transfers data to the user interface on the panel. Panel controls and indicators do not transfer data deterministically, so using an indicator in a Timed Loop could introduce enough jitter to prevent deterministic execution for the task.|
|Use RT FIFO Write to transfer data from a deterministic task to a non-deterministic task.|
|Use RT FIFO Read to access data produced by a deterministic task. When using RT FIFO Read in a non-deterministic task, set the timeout in ms to -1 to ensure that the node never returns null values.|
|Stop Timed Structure aborts the execution of the Timed Loop when the While Loop stops. In this example, the While Loop stops when it receives a True Boolean value from a control on the panel. Controls do not transfer data deterministically, so you should never stop a Timed Loop directly from a control on the panel. Stop Timed Structure allows both loops to stop based on the stop condition of the While Loop without placing a control directly in the Timed Loop. This avoids introducing jitter into the Timed Loop.|
Make sure to configure a Timed Loop with a period large enough to perform the deterministic task and still have idle time during the iteration to allow lower priority loops and structures to execute. Because Timed Loops preempt other tasks, a Timed Loop can monopolize all of the processor resources and prevent lower priority tasks from executing.