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Number to Fractional String (G Dataflow)

Last Modified: February 28, 2020

Converts a numeric value to an F-format (fractional notation), floating-point string.



An input to this operation.

This input supports waveforms and any data type that contains only numbers, such as scalar numbers, arrays or clusters of numbers, and arrays of clusters of numbers.

Data Type Changes on FPGA

When you add this node to a document targeted to an FPGA, this input has a default data type that uses fewer hardware resources at compile time.



A number specifying how many characters to use to express number as a string.

If width is less than the number of characters required, this node uses exactly as many characters as needed. If width is greater than the number of characters required, this node adds a space on the left side of the output string for each additional character.

Default: No value — Exactly as many characters as are needed to represent the number, with no extra padding.



A number specifying the number of digits after the decimal point in the output string. The node rounds number to this decimal place.

Default: 0


use system decimal point?

Boolean specifying whether to use the system decimal separator to designate a decimal point.

True This node uses the localized decimal separator.
False This node uses a period as the decimal separator.

Default: True


fractional format string

number represented as a fractional string.

This output can be Inf, -Inf, or NaN if the value you wire to number is infinity or is not a number.

The following table shows how the values of number, width, and precision affect fractional format string. In this table, the underline character ( _ ) represents a space in fractional format string.
number width precision fractional format string Comments
4.911 6 2 _ _4.91 number is rounded, padded with spaces on the left.
.003926 8 4 _ _0.0039 number is rounded, padded with spaces on the left.
-287.3 5 0 _-287 number is rounded, padded with spaces on the left.

Where This Node Can Run:

Desktop OS: Windows

FPGA: All devices (only within an optimized FPGA VI)

Web Server: Supported in VIs that run in a web application

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