Table Of Contents
Digital Pattern Generator (Ramp) (G Dataflow)
Version:
Last Modified: January 12, 2018
Generates a ramp digital waveform that contains a binary count-up pattern that starts at zero and counts up by one until it reaches 2 n-1, where n equals the number of signals you specify.
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number of samples
The number of samples to include in the generated digital waveform.
Default: 256
number of signals
The number of signals to include in the generated digital waveform.
Default: 8
sample rate
The sample rate of the generated digital waveform.
Default: 1000
digital waveform
The generated ramp pattern.
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported
Web Server: Not supported in VIs that run in a web application