Test your application on three levels: unit, component, and system. Testing smaller portions of code as you create them saves time by identifying and preventing errors and bugs as your program grows. If you test and debug the functionality of the code extensively at the unit and component levels, you reduce the potential for errors at the system level.
Refer to the following guidelines for help identifying units, components, and systems:
You can call units as subVIs or subCDLs that you can reuse throughout your application.
Create Testbench VIs to test individual units and components of your application as you complete them. A testbench is typically a VI that provides simulated input values to your code and displays the output of the code on the panel. When your system is complete, you can create a Testbench VI that runs your entire application, or you can simply run your host application.
The following list provides examples of tests you might perform on various FPGA-targeted documents: