To complete this task, you need a host VI and a compiled bitfile for the FPGA VI.
Use the
FPGA Host Interface
nodes to download, run, and communicate with code on the FPGA.
What to Use
What to Do
Create the following diagram to download and run your FPGA VI to an FPGA target.
Customize the gray sections for your unique programming goals.
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Use the device name for your FPGA found in SystemDesigner to specify an FPGA target. To ensure your code runs on the FPGA, the
device name
input must match the FPGA device name.
To specify the FPGA bitfile you want to deploy to the target, complete the following steps:
-
On the diagram, select the
Open FPGA Reference
node.
-
On the
Item
tab, in the
Mode
section, select
Run bitfile on hardware.
- In the
File
list, select a bitfile within your project or select
Dynamic reference
and wire the bitfile path to the
bitfile path
input of the
Open FPGA Reference
node.
When you run this host VI, a reference to the FPGA application associated with the bitfile you selected opens and runs on the FPGA target you specify.
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Download the FPGA VI specified in the bitfile to the FPGA target and run the VI. The
Download FPGA VI
and
Run FPGA VI
nodes replace the code on the FPGA each time you run the FPGA VI, ensuring that the FPGA VI properly resets before each execution.
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Use the
FPGA Host Interface
nodes to interact with and send data to the FPGA. In this example, the host and the FPGA VI communicate in the following ways:
-
Read/Write FPGA Control—The VIs write to and read from controls and indicators on their panels.
-
DMA FIFO nodes—The VIs write to and read from a DMA FIFO on the FPGA.
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Use the
Close FPGA VI Reference
node to close every reference the
Open FPGA Reference
node creates.
If you don't close the reference, the FPGA VI runs until the host application stops running.
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Examples
Search within the programming environment to access the following installed example:
FPGA Host Interface.
