Table Of Contents

Open FPGA Reference (G Dataflow)

Last Modified: February 27, 2020

Opens a reference to an FPGA bitfile or an FPGA application in simulation. This node executes the referenced bitfile or application by default.

Select a bitfile or application to reference in the following ways depending on which mode you choose on the Item tab.

  • Run bitfile on hardware—Select a bitfile to run on an FPGA target. If your project includes bitfiles, LabVIEW NXG displays them in the File list for you to choose from. You can also select Dynamic reference in the File list, which allows you to reference a bitfile on disk by path at run time using the bitfile path input.
  • Simulate application on this computer—Select an FPGA application from your project to run in simulation mode on the host. If your project does not include an FPGA application, this option is grayed out.
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    Note

    This mode is not supported on real-time targets. You cannot build the host VI into an executable or GLL if you set the Open FPGA Reference node to this mode.

Programming Patterns

Transferring Data between a Target and Host Using FIFOs

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host interface

Interface of the FPGA bitfile that this node returns a reference to.

This input is available only if you select Run bitfile on hardware» Dynamic reference on the Item tab.

Defining an Interface for the FPGA Reference

To define an interface for the FPGA reference, complete the following steps:

  1. Right-click the host interface input and select Create constant or Create control.
  2. Select the constant or control you just created and click Configure on the Item tab.
  3. Load the interface in either of the following ways:
    • Click Import bitfile and select a bitfile (.lvbitx).
    • Click Import bitfile application and select an application (.gcomp).
    The interface consists of resources in a bitfile, such as controls, indicators, FIFOs, and target-specific methods.
  4. Click OK.
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device name

Device name of the FPGA target on which you want to run the bitfile. For local targets, use the device name on the Item tab of the target in SystemDesigner. For remote targets, use the following format for the device name: rio://hostname/DeviceName . For example, rio://10.34.2.40/RIO0.

If you set this node to the Simulate application on this computer mode, the node ignores this input.

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bitfile path

Path to the bitfile. The resources and resource data types in the bitfile must match the interface you define in host interface.

Bitfiles must have a .lvbitx extension. This node supports bitfiles built with the following software:

  • LabVIEW NXG—Excluding bitfiles that use the fixed-point data type with overflow enabled.
  • LabVIEW 2016 or later

This input is available only if you select Run bitfile on hardware» Dynamic reference on the Item tab.

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run?

A Boolean that determines whether the bitfile or application executes immediately after the node opens a reference to it. In most scenarios, wire a False constant to this input to make sure the bitfile or application resets properly after each execution.

True The bitfile or application executes when the node opens a reference to it.
False The bitfile or application does not execute when the node opens a reference to it. Use the Download FPGA VI and Run FPGA VI nodes to explicitly download and run the bitfile or application. This action ensures that the bitfile or application is properly reset by replacing the code on the FPGA before each execution.

Default: True

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error in

Error conditions that occur before this node runs.

The node responds to this input according to standard error behavior.

Standard Error Behavior

Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.

error in does not contain an error error in contains an error
If no error occurred before the node runs, the node begins execution normally.

If no error occurs while the node runs, it returns no error. If an error does occur while the node runs, it returns that error information as error out.

If an error occurred before the node runs, the node does not execute. Instead, it returns the error in value as error out.

Default: No error

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reference out

Reference to the bitfile or application.

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error out

Error information.

The node produces this output according to standard error behavior.

Standard Error Behavior

Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.

error in does not contain an error error in contains an error
If no error occurred before the node runs, the node begins execution normally.

If no error occurs while the node runs, it returns no error. If an error does occur while the node runs, it returns that error information as error out.

If an error occurred before the node runs, the node does not execute. Instead, it returns the error in value as error out.

Where This Node Can Run:

Desktop OS: Windows

FPGA: Not supported

Web Server: Not supported in VIs that run in a web application


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