Flush FIFO (Clock-Driven Logic)

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Last Modified: February 27, 2020

Empties data from the FIFO and sends the data to the recipient.

For DMA target-to-host FIFOs, the recipient is the host. For peer-to-peer writer FIFOs, the recipient is the peer-to-peer reader FIFO. You must enable the peer-to-peer stream when flushing a peer-to-peer writer FIFO. Otherwise, this node executes but does not flush the FIFO.

Note

Flush FIFO must be in the same clock domain as the Write FIFO node. Otherwise, the program returns a code generation error when you try to compile the FPGA VI.

reference in

Reference to the FIFO.

error in

Error conditions that occur before this node runs.

The node responds to this input according to standard error behavior.

Standard Error Behavior

Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.

error in does not contain an error	error in contains an error

If no error occurred before the node runs, the node begins execution normally. If no error occurs while the node runs, it returns no error. If an error does occur while the node runs, it returns that error information as error out.	If an error occurred before the node runs, the node does not execute. Instead, it returns the error in value as error out.

Default: No error

reference out

Reference to the FIFO.

error out

Error information.

The node produces this output according to standard error behavior.

Standard Error Behavior

error in does not contain an error	error in contains an error

If no error occurred before the node runs, the node begins execution normally. If no error occurs while the node runs, it returns no error. If an error does occur while the node runs, it returns that error information as error out.	If an error occurred before the node runs, the node does not execute. Instead, it returns the error in value as error out.

When to Use the Flush FIFO Node

Use the Flush FIFO node when the need for lower latency outweighs the need for higher data transfer rates. If you overuse the Flush FIFO node, you may reduce data transfer rates.
You can use the Flush FIFO node to flush FIFOs regardless of whether the Write FIFO node uses a handshaking interface or a timeout interface. For example, the flush still works in the following situations:
- The Timed Out? output of the Write FIFO node returns True when you use the Flush FIFO node.
- The Ready for Input output of the Write FIFO node returns False when you use the Flush FIFO node.

Simultaneous Flushes

If you use the Flush FIFO node when another FIFO flush is in progress, the two flushes merge.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices

Web Server: Not supported in VIs that run in a web application

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