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Pattern Generator (Ramp Pattern by Samples) (G Dataflow)

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Last Modified: June 25, 2019

Generates a signal containing a ramp pattern of samples.

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type

Type of ramp to generate.

Name Value Description
Linear 0 Uses the linear type.
Logarithmic 1 Uses the logarithmic type.

Default: Linear

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start

First value of the ramp. This node does not impose conditions on the relationship between start and end. Therefore, this node can generate ramp-up and ramp-down patterns.

Default: 0

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end

Final value of the ramp. This node does not impose conditions on the relationship between start and end. Therefore, this node can generate ramp-up and ramp-down patterns.

Default: 1

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exclude end

A Boolean that determines whether to use the final value of the ramp to generate the ramp pattern.

True Ignores the final value of the ramp when generating the ramp pattern.
False Uses the final value of the ramp when generating the ramp pattern.

Default: False

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error in

Error conditions that occur before this node runs.

The node responds to this input according to standard error behavior.

Standard Error Behavior

Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.

error in does not contain an error error in contains an error
If no error occurred before the node runs, the node begins execution normally.

If no error occurs while the node runs, it returns no error. If an error does occur while the node runs, it returns that error information as error out.

If an error occurred before the node runs, the node does not execute. Instead, it returns the error in value as error out.

Default: No error

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dt

Sampling rate in samples per second.

This input is available only if you configure this node to return a waveform.

Default: 0.1

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samples

Number of samples in the pattern.

samples must be greater than 0. Otherwise, this node returns an error.

Default: 128

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t0

Timestamp of the output signal. If this input is unwired, this node uses the current time as the timestamp of the output signal.

This input is available only if you configure this node to return a waveform.

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ramp pattern

Output ramp pattern.

This output can return a waveform or an array of double-precision, floating-point numbers.

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error out

Error information.

The node produces this output according to standard error behavior.

Standard Error Behavior

Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.

error in does not contain an error error in contains an error
If no error occurred before the node runs, the node begins execution normally.

If no error occurs while the node runs, it returns no error. If an error does occur while the node runs, it returns that error information as error out.

If an error occurred before the node runs, the node does not execute. Instead, it returns the error in value as error out.

Algorithm for Generating the Linear Ramp Pattern

Let the sequence X represent ramp pattern. If type is Linear, the node generates the pattern according to the following equation:

x i = x 0 + i Δ x

for i = 0, 1, 2, …, n - 1

where

  • x 0 is start
  • n is the number of samples
  • Δ x = ( end − start ) m , m = n if exclude end? is True. Otherwise, m = n − 1 .

Algorithm for Generating the Logarithmic Ramp Pattern

Let the sequence X represent ramp pattern. If type is Logarithmic, the node generates the pattern according to the following equation:

x i = exp [ ln ⁡ ( x 0 ) + i Δ x ] ⁡

for i = 0, 1, 2, …, n - 1

where

  • x 0 is the start
  • n is the number of samples
  • Δ x = [ ln ( end ) − ln ( start ) ] m , m = n if exclude end? is True. Otherwise, m = n − 1 .
  • start and end must be greater than 0.

Where This Node Can Run:

Desktop OS: Windows

FPGA: Not supported

Web Server: Not supported in VIs that run in a web application

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