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Decimate 1D Array (Clock-Driven Logic)

Last Modified: September 13, 2017

Divides the elements of an array into multiple output arrays, placing elements into the outputs successively.

This node drops any elements that cause the output arrays to have different lengths.



A 1D array of any type.


decimated array

The node stores array[0] at index 0 of the first output array, array[1] is stored at index 0 of the second output array, array[n-1] at index 0 of the last output array, array[n] at index 1 of the first output array, and so on, where n is the number of output terminals for this node.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices

Web Server: Not supported in VIs that run in a web application

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